Deterministic Frequency Boost and Voltage Enhancements on the POWER10TM Processor

Abstract

Digital droop sensors with core throttling mitigate microprocessor voltage droops and enable a voltage control loop (undervolting) to offset loadline uplift plus noise effects, protecting reliability VDDMAX. These combine with a runtime algorithm for Workload Optimized Frequency (WOF) that deterministically maximizes core frequency. The combined effect is demonstrated across a range of workloads including SPECTM , and provides up to a 15% frequency boost and a 10% reduction in core voltage.