Rafae Bhatti, Elisa Bertino, et al.
Communications of the ACM
Gate-level logic simulation takes up more CPU time as system complexity increases. A special-purpose system which can cut verification time by several orders of magnitude is described. The Yorktown Simulation Engine (YSE) is a highly parallel programmable machine which can simulate up to 1 M gates at a speed of over 2000M gate simulations per second. It is estimated that the IBM 3081 processor could have been simulated at over 1 000 instructions per second on YSE. Gate-level logic simulation is reviewed and the architecture and hardware implementation of the YSE is described. The software architecture, including compiler, linker and register-level language translator, Ysetran, architecture, are detailed. © 1983.
Rafae Bhatti, Elisa Bertino, et al.
Communications of the ACM
Liqun Chen, Matthias Enzmann, et al.
FC 2005
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
Alfonso P. Cardenas, Larry F. Bowman, et al.
ACM Annual Conference 1975