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Today's supercomputers will be tomorrow's embedded devices

IBM Haifa Labs News Center


January 02, 2006


IBM Haifa Compiler and Architecture seminar exposes advanced architectures to academic and hi-tech leaders from across the globe


Haifa Israel December 2005 – The annual Compiler and Architecture Leadership Seminar recently held at and organized by the IBM Haifa Research Lab was a tremendous success in helping attendees from around the globe network expand the breadth of their knowledge regarding new advances in compilers and architectures.

Today's computing devices have increasing demands for higher performance-but advances in technology don't necessarily bring about better performance. The market trends are indicating that current high performance processors, or 'supercomputers' will become tomorrow's embedded devices. By bringing together experts from the fields of high performance and embedded computing, the seminar offered attendees a unique opportunity to focus on the architectural challenges currently being faced.

"What we need now are optimizations and compilers that can exploit the new architectural features and technological advances," notes Dr. Bilha Mendelson, manager Code Optimization Technologies at the IBM Haifa Lab and one of the seminar organizers. "Real collaboration between academic and industrial research is essential to uncovering solutions that take advantage of hardware units and optimize their performance."

Although this is the fourth year in a row the seminar is being organized by the IBM Haifa Labs, the event's association with HiPEAC, a European community formed to advance High-Performance Embedded Architecture and Compilation, added a distinct flavor to this year's agenda. The community includes a collection of partners from academia and industry, including UPC in Barcelona, INRIA, Phillips, STMicroelectronics, IBM, Arm and others.

The seminar followed closely on the heels of some HiPEAC cluster meetings, also held at the IBM Haifa Lab. "This opportunity has already produced results in new proposals for the EU's Sixth Framework that will bring about the next generation of architectures and compiler techniques for mobile computing and mobile phones," explained Dr. Ayal Zaks, manager of Compiler Technology R&D at the Haifa Lab and one of the seminar organizers. "As performance gets higher, issues regarding low power consumer devices become even more crucial."

Industry competitors used the seminar as an opportunity to join forces as colleagues interested in advancing the future of microprocessors in the framework of academic discussions and research. The seminar showcased speakers from top technology companies and research centers, including Philips, STMicroelectronics, Intel, IBM, University of Edinburgh, TU Delft, INRIA, University of Edinburgh, The Technion, Haifa University, and Texas A&M University. Some of the seminar highlights included:
  • Kevin O'Brien from IBM's T.J. Watson Research Center talked about the challenges in designing the compiler for the Cell processor, which involved breakthrough architecture and many innovative advances.
  • Ronny Ronen from the Intel Design Center in Haifa described 'Yonah', the new generation of Intel's Centrino chip, which is the first chip to use the new 'Yonah' CMP architecture.
  • Mike O'Boyle from the University of Edinburgh introduced innovative ideas for using machine learning techniques in optimizing compilers.
  • Lawrence Rauchwerger from Texas A&M University provided interesting insight on the challenges of combining static with dynamic analysis using compilers.

Seminar participants were very impressed with the seminar and its organization. Participants even initiated a discussion on how to adopt the Haifa model, with other companies hosting events to exchange information and knowledge that will serve to tighten collaboration and cooperation between academia and industry.

 
 

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