Program Day 2
09:30 Keynote Speaker: Verifying Real-Time Software Is Not Reasonable (Today),
Prof. Edward Lee, UC Berkeley
Session Chair: Henry Broodney, IBM Research – Haifa
10:30 Break
11:00 Technical Session 4: Hardware Verification and Validation
Session Chair: Eli Singerman, Intel
11:00 Leveraging Accelerated Simulation for Floating-Point Regression,
John Paul, Elena Guralnik, Anatoly Koyfman, Amir Nahir, and Subrat K Panda
11:30 Coverage-based Trace Signal Selection for Fault Localisation in Post-Silicon Validation,
Shucheng Zhu, Georg Weissenbacher, and Sharad Malik
12:00 A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs,
Yoav Katz, Michal Rimon, and Avi Ziv
12:30 (Tool Paper) Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures,
Marcela Simkova and Ondrej Lengal
12:45 Lunch
14:15 Technical Session 5: Systems Engineering
Session Chair: Karen Yorav, IBM Research – Haifa
14:15 Statistical Model Checking for Safety Critical Hybrid Systems: An Empirical Evaluation,
Youngjoo Kim, Moonzoo Kim, and Taihyo Kim
14:45 A New Test-Generation Methodology for System-Level Verification of Production Processes,
Tamer Salman, Allon Adir, Alex Goryachev, Lev Greenberg, and Gil Shurek
15:15 Defining and Model Checking Abstractions of Complex Railway Models Using CSP||B,
Faron Moller, Hoang Nga Nguyen, Markus Roggenbach, Steve Schneider, and Helen Treharne
15:45 Break
16:00 Invited Talk: Reducing Costs While Increasing Quality,
Dr. Orna Raz, IBM Research – Haifa
Session Chair: Orna Grumberg, Technion
17:00 Social Activity
Keynote speakers
As in previous years, the post-conference proceedings will be published in Springer's Lecture Notes in Computer Science series (LNCS).
HVC 2012 Poster
