The following are some of the research challenges regarding VLIW architectures which we are investigating:

• How much instruction-level parallelism can be extracted from programs?
  
  
• What are the features required in a processor for adequately exploiting the ILP extracted by the compiler?
  
  
• What are the restrictions imposed by the technology which limit the exploitation of ILP?
  
  
• How can object-code compatibility be achieved in VLIW architectures? That is, is it possible to write a VLIW program in machine-level language, in such a way that the same program can be used in different implementations of the same architecture?
  
  
• How can compatibility with existing architectures be achieved? That is, is it possible to exploit VLIW techniques as an extension to existing architectures? If not, how can existing code be executed efficiently on a VLIW architecture?
  
  
• What areas are more amenable to exploiting VLIW techniques? Engineering/technical, commercial, graphics applications, others?