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PATENTS
| U.S.
Patent |
Title |
| 6,560,693 |
Branch history guided instruction/data prefetching |
| 6,418,525 |
Methods and apparatus for reducing latency in
set-associative caches using set prediction |
| 6,331,253 |
Methods for caching cache tags |
| 6,055,621 |
Touch history table |
| 5,809,566 |
Automatic cache prefetch timing with dynamic trigger
migration |
| 5,790,823 |
Operand prefetch table |
| 5,636,364 |
Method for enabling concurrent misses in a cache memory |
| 5,634,119 |
Computer processing unit employing a separate millicode
branch history table |
| 5,584,002 |
Cache remapping using synonym classes |
| 5,434,985 |
Simultaneous prediction of multiple branches for superscalar
processing |
| 5,353,421 |
Multi-prediction branch prediction mechanism |
| 5,233,702 |
Cache miss facility with stored sequences for data fetching
|
| 5,197,139 |
Cache management for multi-processor systems utilizing
bulk cross-invalidate |
| 4,903,196 |
Method and apparatus for guaranteeing the logical integrity
of data in the general purpose registers of a complex multi-execution
unit uniprocessor |
| 4,823,259 |
High speed buffer store arrangement for quick wide transfer
of data |
| 4,807,110 |
Prefetching system for a cache having a second directory
for sequentially accessed blocks |
| 4,774,654 |
Apparatus and method for prefetching subblocks from
a low speed memory to a high speed memory of a memory hierarchy depending
upon state of replacing bit in the low speed memory |
| 4,679,141 |
Pageable branch history table |
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