Gero Dittmann

Address

IBM T.J. Watson Research Center
1101 Kitchawan Road /  P.O. Box 218
Yorktown Heights, NY 10598
U.S.A.
Tel.:   +1-914-945 2221
Fax:    +1-914-945 4254
E-mail: gdittma@us.ibm.com

Features

• Working as a researcher in John Darringer's System-Level Design group at the IBM T.J. Watson Research Center since July 2006.
• Previously worked as a researcher in Ton Engbersen's I/O Network Architecture group and Andreas Herkersdorf's Network Processor Hardware group at the IBM Zurich Research Laboratory in Switzerland for six years.
• Defended a Ph.D. with Prof. Lothar Thiele at ETH Zurich (Swiss Federal Institute of Technology) on instruction-set synthesis for fine-grained timing constraints in August 2005. Co-Advisors were Prof. Andreas Herkersdorf from TU Munich, Germany, and Prof. Paolo Ienne from EPFL.
• Graduated from Darmstadt University of Technology, Germany, in March 2000 with a Dipl.-Ing. (~ M.Sc.) degree in electrical engineering.

Research

• Current projects:
  • SLATE: Tools for early system analysis of transaction-level models for power and performance.
  • Power management algorithms for multi-core processors.
• Past projects:
  • The Diadem Firewall, an EU-funded FP6 research project on a distributed firewall infrastructure.
  • HPC interconnect network for PERCS.
  • Concept, architecture, and design methods for a next-generation network processor.
• Research interests:
  • System-level design methods.
  • Power-management algorithms.
  • ASIPs (application-specific instruction-set processors), in particular for high-speed network processors.
  • Network protocols.
  • Real-time compiler technology.
  • Applied graph theory.
• -> Publications

Non-research items

• I have collected a translation table from the Swiss Schriftdeutsch (not the dialect!) to the German Hochdeutsch. (Always incomplete and imperfect, of course...) Comments, corrections, and contributions welcome!
• A collection of random wisdom.