We will distribute proceedings of the abstracts to the attendees.

Please note that we will not be providing workshop attendees with copies of the presentations. If you are presenting and wish to distribute hardcopy and/or electronic versions of your material, please make your own arrangements to do so.

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Saturday, June 27

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Registration:  07:30-08:15

Welcome:  08:15-08:30

Session A:  08:30-10:15
System Characterization and Performance Analysis

(15-minute talks, including questions)

• Characterizing Memory System Performance for Local and Remote Accesses in High End SMPs, Low End SMPs and Clusters of PC SMPs
  Ch. Kurmann and T. Stricker
  ETHZ - Swiss Institute of Technology
• Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors
  Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, and Luiz A. Barroso
  Rice University and DEC WRL
• Scalability of Hardware CCNUMA Systems: A Case Study of the SGI Origin2000
  Dongming Jiang and JP Singh
  Princeton University
• Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster
  Cheng Liao, Dongming Jiang, Liviu Iftode, Margaret Martonosi, Douglas W. Clark
  Princeton University
• Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors
  Maged M. Michael and Ashwini K. Nanda
  IBM T.J. Watson Research Center
• On Cache Size Requirements of Decision-Support Systems for Shared-Memory Multiprocessors
  Magnus Karlsson, Fredrik Dahlgren and Per Stenstrom
  Chalmers University of Technology
• Improving the Speed vs. Accuracy Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors
  Murthy Durbhakula, Vijay S. Pai, Sarita V. Adve
  Rice University

Session B:  11:00-12:30
System Architecture and Implementation

(15-minute talks, including questions)

• Integrated Processor Mechanisms for Software Shared Memory
  Nicholas P. Carter, William J. Dally, Andrew Chang, Stephen W. Keckler, Whay S. Lee
  Stanford University and MIT
• Sharing Data in Page-Based Intelligent Memory
  Mark Oskin, Timothy Sherwood, Justin Hensley, Sinclair Yeh, and Frederic T. Chong
  University of California at Davis
• Hypercube Embedding and Routing in the Origin 2000 Network
  Yuval Koren
  Silicon Graphics
• The FLASH Multiprocessor: System and Bringup Status
  Jeffrey Kuskin, David Ofelt, and Joel Baxter
  Stanford University
• Serially Multiported DRAM (SMDRAM) for SMP Architectures
  D. Litaize, W. Hlayhel
  I.R.I.T. University Paul Sabatier
• A New Look at the Effectiveness of Hardware Combining
  Eric Freudenthal, Allan Gottlieb
  New York University

Lunch:  12:30-14:00

Session C:  14:00-15:45
Cache Coherence Implementation Issues; Software-Based DSM Techniques

(15-minute talks, including questions)

• Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
  Manoj Plakal, Daniel J. Sorin, Anne E. Condon, and Mark D. Hill
  University of Wisconsin - Madison
• A New Efficient Arrangement of Directory Bits for Cache Coherence
  Jong Hyuk Choi and Kyu Ho Park
  Dept. of Electrical Engineering, KAIST; IBM T. J. Watson Research Center;
• A Cache Consistency Protocol for the Location Consistent Memory Model
  Vivek Sarkar, Guang R. Gao, J. N. Amaral
  IBM Research and University of Delaware
• Hardware for Speculative Parallelization in Large- and Small-Scale Multiprocessors
  Ye Zhang, Venkata Krishnan, Lawrence Rauchwerger and Josep Torrellas
  UIUC, Texas A&M
• Software Cache Coherence with Memory Scaling
  Nikos Hardavellas, Leonidas Kontothanassis, Rishiyur Nikhil, and Robert Stets
  DEC Cambridge Research Lab, University of Rochester
• Comparative Evaluation of Fine- and Coarse-Grain Approaches for Software Distributed Shared Memory
  Sandhya Dwarkadas, Kourosh Gharachorloo, Leonidas Kontothanassis, Dan Scales, Michael Scott, and Robert Stets
  University of Rochester, DEC WRL and DEC CRL
• Implementation and Performance of Shared Virtual Memory Protocols on SHRIMP
  Liviu Iftode, Matthias Blumrich, Cezary Dubnicki, David Oppenheimer, Jaswinder Pal Singh and Kai Li
  Princeton University

Session D:  16:30-17:30
Software-Based DSM Techniques; Compilation Techniques

(15-minute talks, including questions)

• Software and Hardware Interactions in Thread-Level Speculation
  Basem Adnan Nayfeh
  Stanford University
• Memory disambiguation and Access compilation for ILP on Raw machines
  Rajeev Barua, Walter Lee, Saman Amarasinghe, and Anant Agarwal
  MIT LCS
• Speculative Parallelization Using Affine Address Prediction on Shared Memory Multiprocessors
  Saman Amarasinghe, Srikrishna Devabhaktuni, Darin Petkov
  MIT
• Compiler Support for Data Forwarding in Scalable Shared-Memory Multiprocessors
  David A. Koufaty and Josep Torrellas
  Intel, UIUC

Session E:  Invited talks on Scalable Enterprise Systems: 08:00-09:30

• Leveraging and Exploiting large Memories in Scalable Memory Coupled Enterprise Servers
  T. Basil Smith
  IBM TJ Watson Research Center
• Scalability in UnixWare 7.
  Jonathan Saks and Rohit Chawla
  SCO
• System Software Support for Fault Containment in Scalable Shared-Memory Multiprocessors
  Dan Teodosiu
  Stanford University

Session F:  10:00-11:00
Miscellaneous Topics

(15-minute talks, including questions)

• An Event-Driven Hybrid Monitoring Concept for PC-Clusters with Hardware-Supported Distributed Shared Memory
  Wolfgang Karl
  Technische Universitaet Muenchen
• SUDS: All-software Speculation Support for Raw Processors
  Matthew Frank, C. Andras Moritz, Benjamin Greenwald, Michael Taylor, Jonathan Babb, Saman Amarasinghe and Anant Agarwal
  MIT
• Network Interface Support for Shared Virtual Memory on Clusters
  Angelos Bilas, Cheng Liao and Jaswinder Pal Singh
  Princeton
• Quantitative Characterization and Analysis of the I/O Behavior of a Commercial Distributed-shared-memory Machine
  Rajesh Bordawekar
  California Institute of Technology

Workshop conclusion:  11:00

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