Ashwini Nanda leads research, technology and strategy on Cell Processor Based Systems, including the IBM Cell Blades prototype, at IBM TJ Watson Research Center, Yorktown Heights, NY.The Cell Blades Prototype is targeted at a broad class of digital media, streaming and supercomputing applications including games, movies, broadcasting, military simulation, security, surveillance, communication, next generation web serving, life sciences, financial analysis, and others that demand very high level of integer streaming or floating point performance. In this capacity he is responsible for the development of application prototypes, programming models, software tools and next generation architecture for system platforms around IBM's Cell processor. Ashwini also has a joint responsibility with the product teams in IBM for customer relationship and business development around Cell Processor Based Systems.

Ashwini joined IBM T.J. Watson Research Center in 1995 as a Research Staff Member. He established and managed the Scalable Server Architecture group for several years at IBM Research. He and his team developed technology for shared memory supercomputing that was adopted by IBM's NUMAQ division. Ashwini and his team also developed hardware and software prototyping tools such as the MemorIES platform to help design commercial server systems. Additionally, during a one year technical staff assignment in the office of VP, Systems, Ashwini had helped in developing the overall systems research strategy for IBM.

Prior to joining IBM, Ashwini had worked at Texas Instruments, Dallas, for two years as a lead architect of the Amazon processor where he developed key concepts such as atomic ops and misprediction recovery cache. While working for Wipro, Bangalore during late eighties, he led the development of an Intel x386 based parallel computer system for India's highly successful missile research program.

Ashwini served on the editorial board of IEEE Transactions on Parallel and Distributed Systems during 2001-04, was co-editor of the Feb.'03 issue of IEEE Computer magazine, and served on an NSF panel for funding university proposals. He was co-general chair of the HPCA-2001 conference held in Monterrey, Mexico.He co-founded the CAECW workshop and co-chaired the Shared Memory workshop for several years and served in program committees of key conferences including ISCA, HPCA, Sigmetrics, Micro, SC, IPPS, ICPP and ICCD. Ashwini has co-authored over 35 research publications in the areas of computer architecture, system design and performance, and parallel processing applications, and holds several US patents in these fields.

Email Ashwini at IBM  

Contact Tel. 914 945 1848