Alexandre E. Eichenberger  IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (Click to contact author). Dr. Eichenberger is a research staff member in the Exploratory System Architecture department at the Watson Research Center. He received a diploma in computer science from Eidgenössische Technische Hochschule in Zurich, Switzerland in 1991, and M.S. and Ph.D. degrees in computer and electrical engineering from the University of Michigan at Ann Arbor in 1993 and 1996, respectively. He was a faculty member of the Department of Electrical and Computer Engineering at North Carolina State University before joining IBM. In addition to his current work in auto-SIMDization, his research interests include instruction-level parallelism, predicated execution, profiling techniques, and software pipelining.

John Kevin O'Brien  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (caomhin@us.ibm.com). Mr. O'Brien has spent the last 24 years at IBM working in the field of compilation and architecture. Initially, at the IBM Toronto Lab, he was the architect of the TOBEY optimizing back end (used in IBM's xlc, xlf, and xlC compiler products). Since then, he has spent 17 years at IBM Research, where his research interests have included multithreaded architecture, Smalltalk, Java™, continuous optimization, binary translation and optimization, parallelization, and vectorization (including SIMDization) for several processors, most recently the Cell Broadband Engine™ processor. Mr. O'Brien received a B.Sc. degree in theoretical physics and an M.Sc. degree in astrophysics from the University of London in 1974 and 1976 respectively. Currently, he is investigating memory-related optimizations for the Cell Broadband Engine™ processor.

Kathryn M. O'Brien  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (kmob@us.ibm.com). Ms. O'Brien has worked at IBM for 23 years, 17 of them as a researcher at the Watson Research Center, where she has been involved in several static and dynamic compilation projects. She received a B.A. degree from Queen's University of Belfast in 1973, and an M.A. degree from the University of London in 1976. Ms. O'Brien was involved in the initial IBM XL Fortran compiler, and the early vectorization and parallelization efforts in the XL compilers. Currently, she is investigating automatic parallelization for the Cell Broadband Engine™ and other architectures.

Peng Wu  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (pengwu@us.ibm.com). Dr. Wu is a research staff member in the High-Performance Software Environment department at the Watson Research Center. She received M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1999 and 2001, respectively. She subsequently joined IBM at the Watson Research Center, where she has worked on compiler optimization, auto-SIMDization, and high-performance computing.

Tong Chen  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (chentong@us.ibm.com). Mr. Chen is a compiler research team member in the Exploratory System Architecture department at the Thomas J. Watson Research Center. He received B.S. and M.S. degrees in computer science from Fudan University, and is a Ph.D. student in computer science at the University of Minnesota. He joined IBM at the Thomas J. Watson Research Center, and his work there has focused on compilers.

Peter H. Oden  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (oden@us.ibm.com). Dr. Oden is a research staff member in the Systems department at the Watson Research Center. He received an A.B. degree from Columbia College in 1955, and M.S. and Ph.D. degrees in electrical engineering from Columbia University in 1958 and 1966, respectively. He joined IBM at the Watson Research Center in 1963, where he has worked on design automation, programming languages and compilers, and computer micro-architecture. He received an IBM Outstanding Contribution Award for his work on design automation in 1968 and an IBM Research Outstanding Technical Achievement Award for his work on compilers in 1981. He is an author or coauthor of several patents and technical papers.

Daniel A. Prener  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598 (prener@us.ibm.com). Dr. Prener is manager of the Exploratory System Architecture group in the Systems department at the Watson Research Center. He received a B.A. degree in mathematics from Swarthmore College in 1965, and M.A. and Ph.D. degrees in mathematics from the University of Pennsylvania in 1967 and 1972, respectively. Before joining IBM, he taught mathematics at the State University of New York at Stony Brook, and mathematics and computer science at Lehman College of the City University of New York. Since joining IBM in 1981, he has worked on computer architecture and compiler optimization in a variety of contexts.

Janice C. Shepherd  c/o Daniel Prener, IBM Research Division, Thomas J Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (janshep@us.ibm.com). Ms. Shepherd is a senior software engineer and works out of her home in Grand Junction, Colorado. She received her B.S. degree from Queen's University in 1980 and her master's degree from the University of Toronto in 1983. Her current interests are in productization and multilanguage support.

Byoungro So  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (bso@us.ibm.com). Dr. So is a post-doctoral researcher in the Computer Architecture department at the Watson Research Center. He received a B.S. degree in computer science from Dongguk University in Seoul, Korea in 1996, and M.S. and Ph.D. degrees in computer science from the University of Southern California in 1998 and 2003, respectively. He subsequently joined IBM at the Watson Research Center, where he has worked on high-performance computing and parallelizing compilers. In 2003, he received an Outstanding Academic Achievement Award from the University of Southern California. Dr. So is a member of the Korean-American Scientists and Engineering Association.

Zehra Sura  IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (zsura@us.ibm.com). Dr. Sura is a research staff member in the Systems department at the Watson Research Center. She received a B.E. degree in computer science from VRCE, in Nagpur, India in 1998, and M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign in 2001 and 2004, respectively. She subsequently joined IBM at the Watson Research Center. Her research interests include analysis and transformation of programs for parallel processing and the use of runtime techniques to improve compiler optimizations.

Amy Wang  IBM Toronto Software Lab, 8200 Warden Ave., Markham, Ontario L6G 1C7, Canada (aktwang@ca.ibm.com). Ms. Wang is a member of the XL compiler back-end team. She obtained a Bachelor of Applied Science degree in 1999 and a Master of Applied Science degree in computer engineering in 2001, both from the University of Toronto. In 2002, she joined the IBM Toronto Software Lab, contributing her skills to the development of various compiler back-end optimizations, such as register allocation and most recently, auto-SIMDization for VMX hardware.

Tao Zhang  College of Computing, Georgia Institute of Technology, 801 Atlantic Drive, Atlanta, Georgia 30332 (zhangtao@cc.gatech.edu). Mr. Zhang is a Ph.D. candidate in computer science at Georgia Institute of Technology. He received a B.S. degree in computer science from Peking University in 2001, and an M.S. degree in computer science from Georgia Institute of Technology in 2003. During his graduate study, he has done work with Dr. Santosh Pande on compiler and architecture optimizations for embedded systems in terms of memory cost, performance, and power. He has also been working on compiler and architecture support for system security.

Peng Zhao  IBM Toronto Lab, 8200 Warden Ave., Markham, Ontario L6G 1C7, Canada (pengz@ca.ibm.com). Mr. Zhao received a B.S. degree in computer science from Beijing University of Aeronautics and Astronautics in 1995, and an M.S. degree in computer science from McMaster University in 2000. He subsequently joined the IBM Toronto lab, where he has worked on the Toronto Portable Optimizer (TPO) team.

Michael K. Gschwind  IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (Click to contact author). Dr. Gschwind is a research staff member at the Watson Research Center. He was one of the originators of the Cell Broadband Engine™ architecture and the architect of the SIMD-based SPU architecture. During the definition of the SPU architecture, Dr. Gschwind developed the first compiler targeting the Cell Broadband Engine architecture. He is currently leading work on future high-performance and low-power architectures focused on media, high-performance, and general-purpose computing applications. Before embarking on the Cell Broadband Engine project, Dr. Gschwind contributed to several generations of binary translation architectures exploiting instruction-level parallelism. He also contributed to the modeling and evaluation of future micro-architectures for IBM's pSeries^® and zSeries^® architectures. Before joining IBM in 1997, he was an Assistant Professor at the Department of Computer Engineering, Technische Universität Wien in Vienna, Austria. Dr. Gschwind received M.S. and Ph.D. degrees in computer science from Technische Universität Wien in 1991 and 1996, respectively. His research interests include compiler and computer architecture and micro-architecture, He is the author of more than 60 papers and holds numerous patents on high-performance computer architecture. Dr. Gschwind has been named an IBM Master Inventor in recognition of his technical contributions and is a Senior Member of the IEEE.

Roch Archambault  IBM Toronto Lab, 8200 Warden Avenue, Markham, Ontario L6G 1C7, Canada (archie@ca.ibm.com). Mr. Archambault is a Senior Technical Staff Member at the IBM Toronto Lab in the compiler development area. His most significant contributions have been as an architect and technical lead in compiler-back-end and optimization technologies for IBM C, C++ and FORTRAN compiler products. He has actively participated in high-performance-computing (HPC) customer-bid situations and played an important role supporting IBM HPC marketing teams. Mr. Archambault has extensive experience in inventing and producing code in the form of prototypes or fully implemented features and is well known for his in-depth knowledge of compiler and optimization technologies.

Yaoqing Gao  IBM Toronto Lab, 8200 Warden Avenue, Markham, Ontario L6G 1C7, Canada (ygao@ca.ibm.com). Dr. Gao is a senior software engineer and is working primarily on compiler optimization. His major interests are computer architecture and compiler optimization. He received an IBM Outstanding Technical Achievement Award in 2002 and IBM Invention Achievement Awards in 2003 and 2004. Before joining IBM, he conducted research on parallel and distributed processing and programming languages at Tsinghua University, the National University of Singapore, the University of Tokyo, and the University of Alberta.

Roland Koo  IBM Software Solutions Toronto Lab, 8200 Warden Avenue, Markham, Ontario L6G 1C7, Canada (rkoo@ca.ibm.com). Mr. Koo is a Senior Manager in the compiler development area. His primary responsibilities involve managing the technical content and delivery of the Toronto Portable Optimizer (TPO), a machine-independent high-level optimizer for IBM XL C/C++ and XL Fortran compiler products. He also supports performance initiatives for delivery of new architectures for the pSeries^® and zSeries^® processors and research initiatives in the area of compiler optimization for future processor architectures. He joined IBM in 1989. His experience includes compiler development, product planning, and project management. He has a bachelor's degree in computer science from the University of Toronto.