Biographical sketches of authors
Toshio Suganuma
IBM Research Division, Tokyo Research Laboratory, 1623-14, Shimotsuruma, Yamato-shi, Kanagawa-ken, 242-8502, Japan (electronic mail: suganuma@jp.ibm.com).
Mr. Suganuma joined IBM in 1992 as a research member at the Tokyo Research Laboratory, and since then he has worked on compiler optimizations and code generation for the High Performance FORTRAN (HPF) compiler and IBM Java Just-in-Time Compiler projects. His research interests are in the area of code optimization, parallel processing, and instruction scheduling. He received the B.E. and M.E. degrees, both in applied mathematics and physics from Kyoto University in 1980 and 1982, respectively, and received the M.S. degree in computer science from Harvard University in 1992. He is currently a research staff member in the Network Computing Platform group.
Takeshi Ogasawara
IBM Research Division, Tokyo Research Laboratory, 1623-14 Shimotsuruma, Yamato-shi, Kanagawa-ken, 242-8502 Japan (electronic mail: takeshi@jp.ibm.com).
Mr. Ogasawara works in the areas of optimizing compilers. He designed and implemented the type inclusion test optimization, the method invocation optimization, and the exception-handling mechanism for the IBM Java Just-in-Time Compiler in the IA32 architecture. He also contributed to the fixed-size buffer management of the just-in-time compiler for Java-based thin clients. He joined IBM in 1991 at the Tokyo Research Laboratory after receiving the B.S. and M.S. degrees in computer science from the University of Tokyo. His research interests include code optimization and memory management.
Mikio Takeuchi
IBM Research Division, Tokyo Research Laboratory, 1623-14 Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502 Japan (electronic mail: mtake@jp.ibm.com).
Mr. Takeuchi joined IBM as a researcher at the Tokyo Research Laboratory in 1993. He has been a member of the IBM Java Just-in-Time Compiler project since 1996, where he has been working on the platform-independent fast register manager and the code generator for platforms based on Intel processors. For this work, he received a Division Award in 1998. His current research interests are the implementation of dynamic languages (especially optimizing compilers and programming environments) and object-oriented technology (especially languages, tools, frameworks, and design patterns). He received the B.E. and M.E. degrees in mathematical engineering and information physics from the University of Tokyo in 1990 and 1993, respectively.
Toshiaki Yasue
IBM Research Division, Tokyo Research Laboratory, 1623-14 Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502 Japan (electronic mail: yasue@jp.ibm.com).
Mr. Yasue received the B.S. and M.S. degrees from the School of Science and Engineering, Waseda University, in Tokyo in 1989 and 1991, respectively. He joined IBM in 1995 and is currently a research member in the Network Computing Platform group at the Tokyo Research Laboratory. His primary research interests include compiler optimization and parallel processing.
Motohiro Kawahito
IBM Research Division, Tokyo Research Laboratory, 1623-14, Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan (electronic mail: JL25131@jp.ibm.com).
Mr. Kawahito received the B.S. degree from Waseda University in 1991. He joined IBM in 1991 as a member of the AIX Systems group at the IBM Yamato Laboratory. He developed the PC simulator, 5080 emulator, WABI, CMDS, and CATIA Viewer. He has been a research member at the Tokyo Research Laboratory since 1997, where he has been working on the exception check elimination, constant propagation, dead store elimination, and class variable privatization for the Java JIT compiler project.
Kazuaki Ishizaki
IBM Research Division, Tokyo Research Laboratory, 1623-14 Shimotsuruma, Yamato-shi, Kanagawa-ken, 242-8502, Japan (electronic mail: ishizaki@trl.ibm.co.jp).
Mr. Ishizaki received the B.S. and M.S. degrees, both in computer science from Waseda University in 1990 and 1992, respectively. Since joining IBM in 1992 at the Tokyo Research Laboratory, he has worked on the High Performance FORTRAN (HPF) compiler. He is currently involved with the IBM Java Just-In-Time Compiler. His research interests include optimizing compiler and processor architectures.
Hideaki Komatsu
IBM Research Division, Tokyo Research Laboratory, 1623-14, Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan (electronic mail: komatsu@jp.ibm.com).
Dr. Komatsu received the B.S. and M.S. degrees in electrical engineering from Waseda University in 1983 and 1985 and the Ph.D. in computer science from Waseda University in 1998. Since joining IBM in 1983 at the Tokyo Research Laboratory, he has carried out research activity in the areas of the optimizing compiler, Prolog compiler, data flow compiler, FORTRAN 90 compiler, High Performance FORTRAN compiler, and the IBM Java Just-in-Time Compiler. His research interests include compiler optimization techniques (register allocation, code scheduling, and loop optimizations) for instruction-level parallel architecture and loop optimizations for massively parallel computers. Dr. Komatsu is currently a research staff member in the Network Computing Platform group.
Toshio Nakatani
IBM Research Division, Tokyo Research Laboratory, 1623-14, Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan (electronic mail: nakatani@jp.ibm.com).
Dr. Nakatani received the B.S. degree in mathematics from Waseda University in 1975, and the M.S.E., M.A., and Ph.D. degrees in computer science from Princeton University, in 1985, 1985, and 1987, respectively. He joined the Tokyo Research Laboratory as a research staff member in 1987 and is currently manager of the Network Computing Platform group. His research interests include architecture, compilers, and algorithms for parallel computer systems.
|
HTML