3D Chip Technology
Is 3D chip technology the next growth engine for performance improvement? by P. Emma and E. Kursun
Three-dimensional silicon integration by J. U. Knickerbocker et al.
Design and fabrication of robust through-silicon vias by P. S. Andry, C. K. Tsang, B. Webb, E. Sprogis, S. L. Wright, and B. Dang
Wafer-level 3D integration technology by S. J. Koester et al.
3D chip-stacking with C4 technology by B. Dang et al.
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections by K. Sakuma et al.
Thermomechanical modeling of 3D electronic packages by S. M. Sri-Jayantha, G. McVicker, K. Bernstein, and J. U. Knickerbocker
Novel through-silicon-vias enable next-generation silicon-germanium power amplifiers for wireless communications by A. Joseph et al.
IBM z10 System
Design and Microarchitecture of the IBM z10 Microprocessor
by C.-L. K. Shum et al.
IBM System z10 processor cache subsystem microarchitecture by P.-K. Mak, C. R. Walters, and G. E. Strait
Decimal floating-point support on the IBM System z10 processor by E. M. Schwarz, J. Kapernick, and M. Cowlishaw
Packaging design of the IBM System z10 central electronic complex by J. G. Torok et al.
Structural and functional test of IBM System z10 chips by G. Salem et al.
IBM System z10 I/O subsystem overview by E. Chencinski et al.
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