|
|
|
|
|
|
Difficult technological challenges facing microprocessor design are forcing a rethinking of how best to utilize the increasing number of transistors provided by Moore's Law. One promising approach is to tailor system characteristics to specific applications. These new "hybrid" system designs combine multiple types of processor cores on a single chip to reduce system power and chip area while improving performance. The twelve papers in this issue describe hybrid system challenges and solutions from component design and optimization to system architectures, design tools, programming models, and applications. This issue explores hardware and software design for hybrid systems, ranging from the first supercomputer to achieve a performance of over one petaflops to medical image processing applications. |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Preface
|
|
M. Gschwind and M. Perrone, Guest Editors
|
|
|
|
|
|
|
|
|
Breaking the petaflops barrier
|
|
D. Grice, H. Brandt, C. Wright, P. McCarthy, A. Emerich, T. Schimke, C. Archer, J. Carey, P. Sanders, J. A. Fritzjunker, S. Lewis, and P. Germann
|
Paper 1
|
|
|
|
|
|
|
|
|
directCell: Hybrid systems with tightly coupled accelerators
|
|
H. Penner, U. Bacher, J. Kunigk, C. Rund, and H. J. Schick
|
Paper 2
|
|
|
|
|
|
|
|
|
|
IBM BladeCenter QS22: Design, performance, and utilization in hybrid computing systems
|
|
J.-S. Vogt, R. Land, H. Boettiger, Z. Krnjajic, and H. Baier
|
Paper 3
|
|
|
|
|
|
|
|
|
|
Integrated execution: A programming model for accelerators
|
|
M. Gschwind
|
Paper 4
|
|
|
|
|
|
|
|
Applying Amdahl’s Other Law to the data center
|
|
D. Cohen, F. Petrini, M. D. Day, M. Ben-Yehuda, S. W. Hunter, and U. Cummings
|
Paper 5
|
|
|
|
|
|
|
|
Software architecture and system validation of an open, unified model for accelerated multicore computing
|
|
C. H. Crawford, D. J. Burdick, J. N. Dale, E. F. Ford, R. A. Mikosh, A. Nobles, and V. To
|
Paper 6
|
|
|
|
|
|
|
|
Cell Broadband Engine processor performance optimization: Tracing tools implementation and use
|
|
M. Biberstein, S. Dori-Hacohen, Y. Harel, A. Heilper, B. Mendelson, U. Shvadron, E. Treister, J. Turek, and M. S. Chang
|
Paper 7
|
|
|
|
|
|
|
|
|
|
The reverse-acceleration model for programming petascale hybrid systems
|
|
S. Pakin, M. Lang, and D. J. Kerbyson
|
Paper 8
|
|
|
|
|
|
|
|
|
|
Programming the Linpack benchmark for Roadrunner
|
|
M. Kistler, J. Gunnels, D. Brokenshire, and B. Benton
|
Paper 9
|
|
|
|
|
|
|
|
MapReduce for the Cell Broadband Engine Architecture
|
|
M. de Kruijf and K. Sankaralingam
|
Paper 10
|
|
|
|
|
|
|
A parallel computing approach for tracking of neuronal fibers
|
|
J. Roth, H. Schiffbauer, and P. Váterlein
|
Paper 11
|
|
|
|
|
|
|
Accelerating 3D nonrigid registration using the Cell Broadband Engine processor
|
|
J. Rohrer and L. Gong
|
Paper 12
|
