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IBM Journal of Research and Development

Electrochemical Technology in Microelectronics Volume 49, Number 1, 2005 Click to enlarge
RD 49-1
The applications of electrochemical technology to microelectronics are expanding rapidly. As the dimensions of the features of microelectronic components have decreased, associated materials effects, interfacial effects, and molecular-scale interactions have become increasingly important for electrochemical metal deposition and removal. The first seven papers in this issue focus on those and other aspects. The issue also includes papers on cache prefetching, logic-based embedded DRAM (eDRAM), and register-renaming mappers for IBM POWER4 processors.
Table of Contents Papers in: PDF    Order No. G322-0242-00
Please note: Papers in HTML are under construction. All papers are available in PDF format.
Electrochemical Technology in Microelectronics Panayotis Andricacos, Guest Editor
Editor's Note
The chemistry of additives in damascene copper plating P. M. Vereecken, R. A. Binstead, H. Deligianni, and P. C. Andricacos p. 3
Superconformal film growth: Mechanism and quantification T. P. Moffat, D. Wheeler, M. D. Edelstein, and D. Josell p. 19
Electrochemical planarization of interconnect metallization A. C. West, H. Deligianni, and P. C. Andricacos p. 37
Multiscale simulations of copper electrodeposition onto a resistive substrate T. O. Drews, S. Krishnan, J. C. Alameda, Jr., D. Gannon, R. D. Braatz, and R. C. Alkire p. 49
Design and modeling of equipment used in electrochemical processes for microelectronics T. L. Ritzdorf, G. J. Wilson, P. R. McHugh, D. J. Woodruff, K. M. Hanson, and D. Fulton p. 65
Tuning the properties of magnetic nanowires L. Sun, Y. Hao, C.-L. Chien, and P. C. Searson p. 79
Recent developments in high-moment electroplated materials for recording heads E. I. Cooper, C. Bonhôte, J. Heidmann, Y. Hsu, P. Kern, J. W. Lam, M. Ramasubramanian, N. Robertson, L. T. Romankiw, and H. Xu p. 103
Regular Papers
Exploring the limits of prefetching P. G. Emma, A. Hartstein, T. R. Puzak, and V. Srinivasan p. 127
Logic-based eDRAM: Origins and rationale for use R. E. Matick and S. E. Schuster p. 145
Organization and implementation of the register-renaming mapper for out-of-order IBM POWER4 processors T. N. Buti, R. G. McDonald, Z. Khwaja, A. Ambekar, H. Q. Le, W. E. Burky, and B. Williams p. 167

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