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IBM eServer z990

Vol. 48, No. 3/4, 2004

Order No. G322-0240
 
This double issue contains 22 papers that describe many aspects of the IBM eServer z990. Although the z990 is built on the legacy of its predecessor, the IBM eServer z900, it has been considerably enhanced to meet the unique computing challenges presented by e-business on demand. The z990 system includes a full 64-bit architecture, modular capacity growth thanks to a new nodal system structure, a substantially advanced I/O subsystem, and unique new features such as the ability to flexibly allocate additional processors on the basis of workload requirements. The z990 significantly advances the capabilities of IBM servers.
RD48-3/4
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Table of contents HTML 
Papers may be viewed by clicking on the title of interest
IBM eServer z990
Message from the Vice President, Systems Hardware Development, IBM Systems and Technology Group Michael Desens
Preface Rolf Schmidt p. 293
Central electronic complex
The IBM eServer z990 microprocessor T. J. Slegel, E. Pfeffer, and J. A. Magee p. 295
The IBM eServer z990 floating-point unit G. Gerwig, H. Wetter, E. M. Schwarz, J. Haess, C. A. Krygowski, B. M. Fleischer, and M. Kroener p. 311
Processor subsystem interconnect architecture for a large symmetric multiprocessing system P. Mak, G. E. Strait, M. A. Blake, K. W. Kark, V. K. Papazova, A. E. Seigler, G. A. Van Huben, L. Wang, and G. C. Wellwood p. 323
Run-control migration from single book to multibooks T. Webel, T. E. Gilbert, and D. Schmunkamp p. 339
Functional verification of the z990 superscalar, multibook microprocessor complex D. G. Bair, S. M. German, W. D. Wollyung, E. J. Kaminski, Jr., J. Schafer, M. P. Mullen, W. J. Lewis, R. Wisniewski, J. Walter, S. Mittermaier, V. Vokhshoori, R. J. Adkins, M. Halas, T. Ruane, and U. Hahn p. 347
Configurable system simulation model build comprising packaging design data H.-W. Anderson, H. Kriese, W. Roesner, and K.-D. Schubert p. 367
First- and second-level packaging of the z990 processor cage T.-M. Winkel, W. D. Becker, H. Harrer, H. Pross, D. Kaller, B. Garben, B. J. Chamberlin, and S. A. Kuppinger p. 379
Packaging the IBM eServer z990 central electronic complex J. C. Parrilla, F. E. Bosco, J. S. Corbin, J. J. Loparco, P. Singh, and J. G. Torok p. 395
Hybrid cooling with cycle steering in the IBM eServer z990 G. F. Goth, D. J. Kearney, U. Meyer, and D. W. Porter p. 409
Millicode in an IBM zSeries processor L. C. Heller and M. S. Farrell p. 425
z990 NetMessage-protocol-based processor to support element communication interface C. Axnix, E. Engler, S. Hegewald, T. Hesmer, M. Kuenzel, and F. M. Welter p. 435
Input/output subsystem
The structure of chips and links comprising the IBM eServer z990 I/O subsystem E. W. Chencinski, M. J. Becht, T. E. Bubb, C. G. Burwick, J. Haess, M. M. Helms, J. M. Hoke, T. Schlipf, J. M. Turner, H. Ulland, M. H. Walz, C. H. Whitehead, and G. Zilles p. 449
Functional verification of a frequency-programmable switch chip with asynchronous clock sections B. Hoppe, B. Arthur-Mensah, E. W. Chencinski, S. Joseph, H. Kumar, and J. F. Silverio p. 461
The IBM PCIXCC: A new cryptographic coprocessor for the IBM eServer T. W. Arnold and L. P. Van Doorn p. 475
Multiple-logical-channel subsystems: Increasing zSeries I/O scalability and connectivity L. W. Wyman, H. M. Yudenfriend, J. S. Trotter, and K. J. Oakes p. 489
SCSI initial program loading for zSeries G. Banzhaf, F. W. Brice, G. R. Frazier, J. P. Kubala, T. B. Mathias, and V. Sameske p. 507
System aspects
Reliability, availability, and serviceability (RAS) of the IBM eServer z990 M. L. Fair, C. R. Conklin, S. B. Swaney, P. J. Meaney, W. J. Clarke, L. C. Alves, I. N. Modi, F. Freier, W. Fischer, and N. E. Weber p. 519
Logical partition mode physical resource management on the IBM eServer z990 I. G. Siegel, B. A. Glendening, and J. P. Kubala p. 535
The GNU 64-bit PL8 compiler: Toward an open standard environment for firmware development W. Gellerich, T. Hendel, R. Land, H. Lehmann, M. Mueller, P. H. Oden, and H. Penner p. 543
The z990 first error data capture concept S. Koerner, R. Bawidamann, W. Fischer, U. Helmich, D. Klodt, B. K. Tolan, and P. Wojciak p. 557
Accelerating system integration by enhancing hardware, firmware, and co-simulation K.-D. Schubert, E. C. McCain, H. Pape, K. Rebmann, P. M. West, and R. Winkelmann p. 569
IBM eServer z990 improvements in firmware simulation M. Stetter, J. von Buttlar, P. T. Chan, D. Decker, H. Elfering, P. M. Gioquindo, T. Hess, S. Koerner, A. Kohler, H. Lindner, K. Petri, and M. Zee p. 583