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IBM eServer z990Vol. 48, No. 3/4, 2004
Order No. G322-0240 |
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This double issue contains 22 papers that describe many aspects of the IBM eServer z990. Although the z990 is built on the legacy of its predecessor, the IBM eServer z900, it has been considerably enhanced to meet the unique computing challenges presented by e-business on demand. The z990 system includes a full 64-bit architecture, modular capacity growth thanks to a new nodal system structure, a substantially advanced I/O subsystem, and unique new features such as the ability to flexibly allocate additional processors on the basis of workload requirements. The z990 significantly advances the capabilities of IBM servers. |
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Papers may be viewed by clicking on the title of interest |
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IBM eServer z990 |
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Message from the Vice President, Systems Hardware Development, IBM Systems and Technology Group |
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Michael Desens |
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Preface |
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Rolf Schmidt |
p. 293 |
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Central electronic complex |
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The IBM eServer z990 microprocessor |
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T. J. Slegel, E. Pfeffer, and J. A. Magee |
p. 295 |
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The IBM eServer z990 floating-point unit |
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G. Gerwig, H. Wetter, E. M. Schwarz, J. Haess, C. A. Krygowski, B. M. Fleischer, and M. Kroener |
p. 311 |
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Processor subsystem interconnect architecture for a large symmetric multiprocessing system |
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P. Mak, G. E. Strait, M. A. Blake, K. W. Kark, V. K. Papazova, A. E. Seigler, G. A. Van Huben, L. Wang, and G. C. Wellwood |
p. 323 |
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Run-control migration from single book to multibooks |
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T. Webel, T. E. Gilbert, and D. Schmunkamp |
p. 339 |
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Functional verification of the z990 superscalar, multibook microprocessor complex |
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D. G. Bair, S. M. German, W. D. Wollyung, E. J. Kaminski, Jr., J. Schafer, M. P. Mullen, W. J. Lewis, R. Wisniewski, J. Walter, S. Mittermaier, V. Vokhshoori, R. J. Adkins, M. Halas, T. Ruane, and U. Hahn |
p. 347 |
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Configurable system simulation model build comprising packaging design data |
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H.-W. Anderson, H. Kriese, W. Roesner, and K.-D. Schubert |
p. 367 |
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First- and second-level packaging of the z990 processor cage |
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T.-M. Winkel, W. D. Becker, H. Harrer, H. Pross, D. Kaller, B. Garben, B. J. Chamberlin, and S. A. Kuppinger |
p. 379 |
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Packaging the IBM eServer z990 central electronic complex |
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J. C. Parrilla, F. E. Bosco, J. S. Corbin, J. J. Loparco, P. Singh, and J. G. Torok |
p. 395 |
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Hybrid cooling with cycle steering in the IBM eServer z990 |
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G. F. Goth, D. J. Kearney, U. Meyer, and D. W. Porter |
p. 409 |
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Millicode in an IBM zSeries processor |
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L. C. Heller and M. S. Farrell |
p. 425 |
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z990 NetMessage-protocol-based processor to support element communication interface |
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C. Axnix, E. Engler, S. Hegewald, T. Hesmer, M. Kuenzel, and F. M. Welter |
p. 435 |
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Input/output subsystem |
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The structure of chips and links comprising the IBM eServer z990 I/O subsystem |
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E. W. Chencinski, M. J. Becht, T. E. Bubb, C. G. Burwick, J. Haess, M. M. Helms, J. M. Hoke, T. Schlipf, J. M. Turner, H. Ulland, M. H. Walz, C. H. Whitehead, and G. Zilles |
p. 449 |
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Functional verification of a frequency-programmable switch chip with asynchronous clock sections |
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B. Hoppe, B. Arthur-Mensah, E. W. Chencinski, S. Joseph, H. Kumar, and J. F. Silverio |
p. 461 |
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The IBM PCIXCC: A new cryptographic coprocessor for the IBM eServer |
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T. W. Arnold and L. P. Van Doorn |
p. 475 |
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Multiple-logical-channel subsystems: Increasing zSeries I/O scalability and connectivity |
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L. W. Wyman, H. M. Yudenfriend, J. S. Trotter, and K. J. Oakes |
p. 489 |
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SCSI initial program loading for zSeries |
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G. Banzhaf, F. W. Brice, G. R. Frazier, J. P. Kubala, T. B. Mathias, and V. Sameske |
p. 507 |
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System aspects |
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Reliability, availability, and serviceability (RAS) of the IBM eServer z990 |
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M. L. Fair, C. R. Conklin, S. B. Swaney, P. J. Meaney, W. J. Clarke, L. C. Alves, I. N. Modi, F. Freier, W. Fischer, and N. E. Weber |
p. 519 |
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Logical partition mode physical resource management on the IBM eServer z990 |
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I. G. Siegel, B. A. Glendening, and J. P. Kubala |
p. 535 |
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The GNU 64-bit PL8 compiler: Toward an open standard environment for firmware development |
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W. Gellerich, T. Hendel, R. Land, H. Lehmann, M. Mueller, P. H. Oden, and H. Penner |
p. 543 |
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The z990 first error data capture concept |
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S. Koerner, R. Bawidamann, W. Fischer, U. Helmich, D. Klodt, B. K. Tolan, and P. Wojciak |
p. 557 |
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Accelerating system integration by enhancing hardware, firmware, and co-simulation |
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K.-D. Schubert, E. C. McCain, H. Pape, K. Rebmann, P. M. West, and R. Winkelmann |
p. 569 |
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IBM eServer z990 improvements in firmware simulation |
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M. Stetter, J. von Buttlar, P. T. Chan, D. Decker, H. Elfering, P. M. Gioquindo, T. Hess, S. Koerner, A. Kohler, H. Lindner, K. Petri, and M. Zee |
p. 583 |
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