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IBM S/390 G3 and G4Vol. 41, No. 4/5, 1997
Order No. G322-0209 |
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On June 9, 1997, IBM announced a new generation of microprocessor-based S/390® mainframe-class servers that deliver performance comparable to that of previous systems built with older, more costly bipolar technology. With this announcement, the S/390 Parallel Enterprise Server Generation 4 (G4) marks the completion of the first stage of the transition of S/390 to CMOS (complementary metal oxide semiconductor) technology, and the beginning of a program to extend this technology to the year 2000 and beyond. This double issue contains sixteen papers which describe advances in IBM S/390 G3 and G4 technology.
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Papers may be viewed by clicking on the title of interest |
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Preface
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Ross A. Mauri
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p. 395
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IBM S/390 Parallel Enterprise Servers G3 and G4
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G. S. Rao, T. A. Gregg, C. A. Price, C. L. Rao, and S. J. Repka
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p. 397
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S/390 Parallel Enterprise Server Generation 3: A balanced system and cache structure
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G. Doettling, K. J. Getzlaff, B. Leppla, W. Lipponer, T. Pflueger, T. Schlipf, D. Schmunkamp, and U. Wille
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p. 405
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Shared-cache clusters in a system with a fully shared memory
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P. Mak, M. A. Blake, C. C. Jones, G. E. Strait, and P. R. Turgeon
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p. 429
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S/390 CMOS server I/O: The continuing evolution
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T. A. Gregg
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p. 449
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A high-frequency custom CMOS S/390 microprocessor
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C. F. Webb and J. S. Liptay
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p. 463
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CMOS floating-point unit for the S/390 Parallel Enterprise Server G4
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E. M. Schwarz, L. Sigal, and T. J. McPherson
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p. 475
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Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor
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L. Sigal, J. D. Warnock, B. W. Curran, Y. H. Chan, P. J. Camporese, M. D. Mayo, W. V. Huott, D. R. Knebel, C. T. Chuang, J. P. Eckhardt, and P. T. Wu
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p. 489
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Standard-cell-based design methodology for high-performance support chips
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B. Kick, U. Baur, J. Koehl, T. Ludwig, and T. Pflueger
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p. 505
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Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors
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K. L. Shepard, S. M. Carey, E. K. Cho, B. W. Curran, R. F. Hatch, D. E. Hoffman, S. A. McCabe, G. A. Northrop, and R. Seigler
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p. 515
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Functional verification of the CMOS S/390 Parallel Enterprise Server G4 system
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B. Wile, M. P. Mullen, C. Hanson, D. G. Bair, K. M. Lasko, P. J. Duffy, E. J. Kaminski, Jr., T. E. Gilbert, S. M. Licker, R. G. Sheldon, W. D. Wollyung, W. J. Lewis, and R. J. Adkins
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p. 549
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Formal verification made easy
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T. Schlipf, T. Buechner, R. Fritz, M. Helms, and J. Koehl
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p. 567
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Run-control and service element code simulation for the S/390 microprocessor
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S. Koerner and S. M. Licker
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p. 577
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Designer-level verification using TIMEDIAG/GENRAND
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B. Wile
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p. 581
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The role of two-cycle simulation in the S/390 verification process
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Gary A. Van Huben
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p. 593
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SimAPI--A common programming interface for simulation
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G. G. Hallock, E. J. Kaminski, Jr., K. M. Lasko, and M. P. Mullen
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p. 601
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Advanced microprocessor test strategy and methodology
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W. V. Huott, T. J. Koprowski, B. J. Robbins, M. P. Kusko, S. V. Pateras, D. E. Hoffman, T. G. McNamara, and T. J. Snethen
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p. 611
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Recent publications IBM authors
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p. 629
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Recent IBM patents
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p. 641
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