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IBM S/390 G3 and G4

Vol. 41, No. 4/5, 1997

Order No. G322-0209
On June 9, 1997, IBM announced a new generation of microprocessor-based S/390® mainframe-class servers that deliver performance comparable to that of previous systems built with older, more costly bipolar technology. With this announcement, the S/390 Parallel Enterprise Server Generation 4 (G4) marks the completion of the first stage of the transition of S/390 to CMOS (complementary metal oxide semiconductor) technology, and the beginning of a program to extend this technology to the year 2000 and beyond. This double issue contains sixteen papers which describe advances in IBM S/390 G3 and G4 technology.
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Table of contents
Papers may be viewed by clicking on the title of interest
Preface Ross A. Mauri p. 395
IBM S/390 Parallel Enterprise Servers G3 and G4 G. S. Rao, T. A. Gregg, C. A. Price, C. L. Rao, and S. J. Repka p. 397
S/390 Parallel Enterprise Server Generation 3: A balanced system and cache structure G. Doettling, K. J. Getzlaff, B. Leppla, W. Lipponer, T. Pflueger, T. Schlipf, D. Schmunkamp, and U. Wille p. 405
Shared-cache clusters in a system with a fully shared memory P. Mak, M. A. Blake, C. C. Jones, G. E. Strait, and P. R. Turgeon p. 429
S/390 CMOS server I/O: The continuing evolution T. A. Gregg p. 449
A high-frequency custom CMOS S/390 microprocessor C. F. Webb and J. S. Liptay p. 463
CMOS floating-point unit for the S/390 Parallel Enterprise Server G4 E. M. Schwarz, L. Sigal, and T. J. McPherson p. 475
Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor L. Sigal, J. D. Warnock, B. W. Curran, Y. H. Chan, P. J. Camporese, M. D. Mayo, W. V. Huott, D. R. Knebel, C. T. Chuang, J. P. Eckhardt, and P. T. Wu p. 489
Standard-cell-based design methodology for high-performance support chips B. Kick, U. Baur, J. Koehl, T. Ludwig, and T. Pflueger p. 505
Design methodology for the S/390 Parallel Enterprise Server G4 microprocessors K. L. Shepard, S. M. Carey, E. K. Cho, B. W. Curran, R. F. Hatch, D. E. Hoffman, S. A. McCabe, G. A. Northrop, and R. Seigler p. 515
Functional verification of the CMOS S/390 Parallel Enterprise Server G4 system B. Wile, M. P. Mullen, C. Hanson, D. G. Bair, K. M. Lasko, P. J. Duffy, E. J. Kaminski, Jr., T. E. Gilbert, S. M. Licker, R. G. Sheldon, W. D. Wollyung, W. J. Lewis, and R. J. Adkins p. 549
Formal verification made easy T. Schlipf, T. Buechner, R. Fritz, M. Helms, and J. Koehl p. 567
Run-control and service element code simulation for the S/390 microprocessor S. Koerner and S. M. Licker p. 577
Designer-level verification using TIMEDIAG/GENRAND B. Wile p. 581
The role of two-cycle simulation in the S/390 verification process Gary A. Van Huben p. 593
SimAPI--A common programming interface for simulation G. G. Hallock, E. J. Kaminski, Jr., K. M. Lasko, and M. P. Mullen p. 601
Advanced microprocessor test strategy and methodology W. V. Huott, T. J. Koprowski, B. J. Robbins, M. P. Kusko, S. V. Pateras, D. E. Hoffman, T. G. McNamara, and T. J. Snethen p. 611
Recent publications IBM authors p. 629
Recent IBM patents p. 641