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Performance analysis and its impact on design

Vol. 41, No. 3, 1997

Order No. G322-0208
This issue of the IBM Journal of Research and Development contains nine papers selected from those presented at the 1996 Workshop on Performance Analysis and Its Impact on Design (PAID-96). This workshop was held March 27-29, 1996, at the IBM Austin Research Laboratory, and was sponsored by the IBM Research Division as one of the technical events organized to mark the 50th anniversary of IBM Research.
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Table of contents
Papers may be viewed by clicking on the title of interest
Preface Pradip Bose, Guest Editor, p. 204
Performance analysis on a CC-NUMA prototype D. R. Kaeli, L. L. Fong, R. C. Booth, K. C. Imming, and J. P. Weigel p. 205
Understanding some simple processor-performance limits P. G. Emma p. 215
Automatic selection of high-order transformations in the IBM XL FORTRAN compilers V. Sarkar p. 233
Prefetching and memory system behavior of the SPEC95 benchmark suite M. J. Charney and T. R. Puzak p. 265
Simulation/evaluation environment for a VLIW processor architecture J. H. Moreno, M. Moudgill, K. Ebcioglu, E. Altman, C. B. Hall, R. Miranda, S.-K. Chen, and A. Polyak p. 287
Dynamic resource management on distributed systems using reconfigurable applications J. E. Moreira and V. K. Naik p. 303
NStrace: A bus-driven instruction trace tool for PowerPC microprocessors P. A. Sandon, Y.-C. Liao, T. E. Cook, D. M. Schultz, and P. Martin-de-Nicolas p. 331
A programmer's view of performance monitoring in the PowerPC microprocessor F. E. Levine and C. P. Roth p. 345
Optimization of TCP segment size for file transfer R. M. Bournas p. 357
Recent publications by IBM authors p. 367
Recent IBM patents p. 379