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IBM POWER6
IBM Power Architecture
IBM POWER6 Microprocessor Technology
Volume 51, Number 6, 2007
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IBM POWER6 reliability - References
by M. J.
Mack
,
W. M.
Sauer
,
S. B.
Swaney
,
and B. G.
Mealey
References
Power.org, Power ISA™ Version 2.04; see
http://www.power.org/resources/downloads/PowerISA_203.Public.pdf
.
J. F. Ziegler, H. W. Curtis, H. P. Muhlfeld, C. J. Montrose, B. Chin, M. Nicewicz, C. A. Russell, et al.,
“IBM Experiments in Soft Fails in Computer Electronics (1978–1994),”
IBM J. Res. & Dev.
40
, No. 1, 3–18 (1996).
H. Ando, Y. Yoshida, A. Inoue, I. Sugiyama, T. Asakawa, K. Morita, T. Muta, et al., “A 1.3-GHz Fifth-Generation SPARC64 Microprocessor,”
IEEE J. Solid-State Circuits
38
, No. 11, 1896–1905 (2003).
M. Mueller, L. C. Alves, W. Fischer, M. L. Fair, and I. Modi,
“RAS Strategy for IBM S/390 G5 and G6,”
IBM J. Res. & Dev.
43
, No. 5/6, 875–888 (1999).
D. C. Bossen, A. Kitamorn, K. F. Reick, and M. S. Floyd,
“Fault-Tolerant Design of the IBM pSeries 690 System Using POWER4 Processor Technology,”
IBM J. Res. & Dev.
46
, No. 1, 77–86 (2002).
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