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IBM Journal of Research and Development

Cell Broadband Engine Technology and Systems   Volume 51, Number 5, 2007
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Cell Broadband Engine processor: Design and implementation - Author Bios

by M. W. Riley,
J. D. Warnock,
and D. F. Wendel
Biographical sketches of authors

Mack W. Riley IBM Systems and Technology Group, 11501 Burnet Road, Austin, Texas 78758 (mwriley@us.ibm.com). Mr. Riley is an IBM Distinguished Engineer. He received an M.S. degree in electrical engineering from Stanford University in California, and a B.S. degree in electrical engineering from Tuskegee University in Alabama. In 1981 Mr. Riley joined IBM as a member of the design and development team for the 5520 Administrative System working on the design of graphics and hard file interfaces to the central processor. Throughout his career, he has been involved with the design and development of systems such as the PC RT and RISC System/6000* workstations that were developed in Austin. Mr. Riley was Chief Engineer for the Austin graphics development team and was involved in the development of low and mid-range 3D graphics subsystems. He has also been a member of the WorldWide Design center as a project manager. Currently Mr. Riley is Chief Engineer for the Sony, Toshiba, and IBM Design Center in Austin, Texas.

James D. Warnock IBM Systems and Technology Group, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598 (jwarnock@us.ibm.com). Dr. Warnock received a B.Sc. degree in Physics from Ottawa University in Ottawa, Ontario, Canada, in 1980, and a Ph.D. degree in physics from the Massachusetts Institute of Technology, Cambridge, Massachusetts, in 1985. Since then, he has been at IBM in Yorktown Heights, New York, initially studying advanced bipolar, complementary bipolar/BiCMOS, and CMOS silicon technologies. Later he was involved with work in the area of circuit design for high-performance digital microprocessors, including the S/390* G4 processor and the POWER4* chip, where he was the circuit design team leader. More recently, he was part of the circuit leadership team for the Cell Broadband Engine. Dr. Warnock is currently working on several microprocessor development programs within IBM, where he is involved with aspects of circuit design tools and methodology, circuit and physical design implementation, local clocking/latch design, and design–technology interactions. He has experience in process technology and device design, as well as in SOI digital circuit design, and has authored or co-authored more than 170 conference or journal papers. He is an IBM Distinguished Engineer and a member of the IBM Academy of Technology.

Dieter F. Wendel IBM Systems and Technology Group, Boeblingen Development Laboratory, Schoenaicher Strasse 220, 71032 Boeblingen, Germany (WENDEL@de.ibm.com). Mr. Wendel is an IBM Distinguished Engineer who joined IBM in 1981 after receiving a B.S. degree in electrical engineering from the University of Wuerzburg, Germany. That same year he worked on the very large scale integration fellowship team in Boeblingen. After a two-year assignment from 1984 to 1986 at the IBM Research Laboratory in Yorktown Heights, New York, he joined the S/390 microprocessor development organization at the IBM Boeblingen Laboratory to work in several areas including test, array design, and custom logic design. Mr. Wendel joined the STI Design Center in Austin, Texas, when it was founded in 2001 as circuit lead. His current interests focus on concepts in high-frequency circuit design and the exploitation of new technologies.

*Trademark, service mark, or registered trademark of International Business Machines Corporation in the United States, other countries, or both.


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