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IBM Journal of Research and Development

Cell Broadband Engine Technology and Systems   Volume 51, Number 5, 2007
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Cell/B.E. blades: Building blocks for scalable, real-time, interactive, and digital media servers - Author Bios

by A. K. Nanda,
J. R. Moulic,
R. E. Hanson,
G. Goldrian,
M. N. Day,
B. D. D'Amora,
and S. Kesavarapu
Biographical sketches of authors

Ashwini K. Nanda IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598 (ashwini@us.ibm.com). As the Chief Architect of Quasar/Cell/B.E. systems, Dr. Ashwini Nanda established and managed the Quasar systems team in the IBM Systems and Technology group. He played a lead role in establishing the Cell/Quasar systems technology, product roadmap (including QS20, the first Cell/B.E. blade product), and business to focus on the emerging compute-intensive, streaming, real-time, and interactive applications. Prior to that, Dr. Nanda led research and prototyping of Cell/B.E. processor–based systems and their application at the IBM Thomas J. Watson Research Center, in Yorktown Heights, New York. Earlier at IBM Research, he established and managed the Scalable Server Architecture group for several years. His key research contributions include MemorIES (Memory Instrumentation and Emulation System) and High Throughput Coherence Controllers. Dr. Nanda was co-General Chair of the International Symposium on High Performance Computer Architecture (HPCA-7), he served on the editorial board of IEEE Transactions on Parallel and Distributed Systems, and co-edited a special issue of the IEEE Computer magazine. He holds ten U.S. patents and has published more than 40 papers on computer systems architecture, design, and performance.

J. Randal Moulic IBM Systems and Technology Group, Enterprise Systems Development, 2455 South Road, Poughkeepsie, New York 12601 (rmoulic@us.ibm.com). Dr. Moulic is an IEEE Fellow and Research Staff Member at the IBM Thomas J. Watson Research Center. In 34 years of research and development work at IBM, he has participated in the development of many high-performance and personal computing systems, including the RS/6000*/Scalable Parallel supercomputers, IntelliStation*, and Cell/B.E. processor graphics workstations, ThinkPad** “TransNote” laptop, and QS20 Cell/B.E. processor server. He founded, organized, and directed the Deep Blue* computer chess project, initiating the first exhibition match events with World Champions Gary Kasparov and Anotoly Karpov. He has authored many technical papers, holds many patents, and is an Adjunct Professor at Columbia and Polytechnic Universities.

Robert E. Hanson IBM Systems and Technology Group, Enterprise Systems Development, 2455 South Road, Poughkeepsie, New York 12601 (rejhan@us.ibm.com). In the past five years, Mr. Hanson has established and led the cross-IBM team to develop Cell/B.E. processor–based systems. He began this work as an emerging technology opportunity within IBM Research and subsequently moved to the Systems and Technology Group (STG) as the leader of the Quasar Design Center to set up the new product effort. This work has since resulted in the release of the original QS20 Cell/B.E. blade and two versions of the Cell/B.E. Software Development Kit, with several generations of the Cell/B.E. systems product in the pipeline to address real-time and digital media applications, as well as broader markets including financial services, medical imaging, aerospace and defense, high-performance computing, and several others. Prior to driving the Cell/B.E. processor–based system work, Mr. Hanson had made extensive contributions to the IBM systems business and technology as the Director of Microprocessor Development. This includes the first IBM CMOS-based zSeries* systems in the 1990s, which brought significant performance enhancements and surpassed the performance of previous-generation bipolar machines by 2.5 times, as well as the first IBM microprocessor capable of running at 1 GHz.

Gottfried Goldrian IBM Systems and Technology Group, Development Laboratory, Schoenaicherstrasse 220, D-71032 Boeblingen, Germany (Goldrian@de.ibm.com). Mr. Goldrian received his diploma in electrical engineering from the Polytechnikum in Munich, Germany, in 1964. He worked for Siemens before he joined IBM in 1967. His first job at IBM was in the development of a digital recorder for computer problem analysis. Since then, he has worked on many different development projects in Boeblingen and San Jose, California. He was the lead designer and architect in the development of printer electronics and later in the development of zSeries I/O attachments. Mr. Goldrian is now a Distinguished Engineer and the lead system architect for all Cell/B.E. processor–based projects in Boeblingen.

Michael N. Day IBM Systems and Technology Group, STI Design Center, 11400 Burnet Road, Austin, Texas 78758 (mnday@us.ibm.com). Mr. Day graduated with a B.S. degree in electrical engineering–computer science from the University of Texas at Austin in 1977. He joined IBM that same year as an engineer designing and implementing hardware and software for a large multi-user timesharing office product system including workstation controllers, full page displays, speech digitization, and filing systems. He then became the lead firmware and software architect for the first battery-powered IBM laptop with advanced power-management features. In 1987, he became a kernel subsystem architect on the IBM Unix OS project called AIX*. Mr. Day was elected to the IBM Academy of Technology in 1992, and he went on to become chief architect of AIX V4, delivering SMP support and kernel-based threads. He was one of the first engineers to be appointed IBM Distinguished Engineer in 1997. A year later, he led a real-time broadband video streaming project, introducing the MediaStreamer* product based on AIX. He then went on to drive the design and implementation of AIX on IA-64, and then moved to the STI project in 2001 as Chief System Software Architect, defining the programming features of the Cell/B.E. processor, enabling Linux and software tool chains to support various programming models for the Cell/B.E. processor. He also leads a team of programmers developing application libraries, test suites, workloads, and demonstration programs for the Cell/B.E. processor.

Bruce D. D'Amora IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (damora@us.ibm.com). Mr. D'Amora is a Senior Technical Staff Member and Digital Media Solutions Architect in the Emerging Systems Software group at the IBM T. J. Watson Research Center. He is currently focusing on the design of Cell/B.E.-based platforms to accelerate applications used for creating digital animation and visual effects. Mr. D'Amora has presented numerous talks over the last several years focusing on the uses and programmability of the Cell/B.E. for accelerating the creation of digital content. He was previously the Chief Software Architect for the 3D graphics development group at IBM Austin, where he led the OpenGL development efforts from 1991 to 2000. He holds B.S. degrees in microbiology and applied mathematics from the University of Colorado, as well as an M.S. degree in computer science from the National Technological University.

Sreeni Kesavarapu IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (sulu@us.ibm.com). Mr. Kesavarapu is a Senior Software Engineer currently leading the development of the digital video surveillance solution on the Cell/B.E. and working as a Lead Consultant in the Cell/B.E. ecosystem and solutions development in the Systems and Technology Group. He has previously contributed to a number of products in mobile and digital media systems, including MPEG and DVD playback software for various ThinkPads and the development of ThinkPad Transnote from concept to product. He received an M.S. degree in computer science from Polytechnic University and a B.Tech. degree in computer science and engineering from Andhra University.

*Trademark, service mark, or registered trademark of International Business Machines Corporation in the United States, other countries, or both.
**Trademark, service mark, or registered trademark of Intel Corporation, Linus Torvalds, InfiniBand Trade Association, Advanced Micro Devices, Inc., Rambus, Inc., PCI-SIG, Red Hat, Inc., OpenMP Architecture Review Board, Apple Computer, Inc., or Lenovo in the United States, other countries, or both.


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