Huiling Shang IBM Systems and Technology Group, 2070 Route 52, Hopewell Junction, New York 12533 (shuilingus.ibm.com). Dr. Shang received her Ph.D. degree in electrical engineering from Lehigh University, Bethlehem, Pennsylvania, in 2001. After graduation, she worked in the Silicon Technology Department at the IBM Thomas J. Watson Research Center as a Research Staff Member. Dr. Shang's current research focuses on the novel material fabrication and device structures for 32-nm-node technology and beyond. Her research interests include strained-germanium and strained-silicon-germanium-channel CMOS device design and integration, and transport physics in ultrathin SOI device and FinFET device technologies. She is a member of the IEEE Electron Device Society and the Sigma Xi honorary (scientific research) society.

Martin M. Frank IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (mmfrankus.ibm.com). Dr. Frank is a Research Staff Member in the Silicon Technology Department at the Thomas J. Watson Research Center. He received a Diplom degree in physics from Ruhr-Universität Bochum, Germany, in 1996. He then performed graduate research on oxide-supported metal nanoparticles at Fritz-Haber-Institut der Max-Planck-Gesellschaft in Berlin, Germany, as a scholar of the German National Merit Foundation, and received a Ph.D. degree in physics from Humboldt-Universität zu Berlin in 2000. During a subsequent postdoctoral appointment at Rutgers University, in collaboration with Agere Systems at Lucent Technologies' Bell Laboratories, he studied dielectric and semiconductor growth on silicon and compound semiconductor surfaces, and metal electrode deposition onto self-assembled monolayers. Dr. Frank joined IBM in 2003. His current research concentrates on high-k gate stacks on silicon and on high-carrier-mobility materials. During an assignment to the Interuniversity MicroElectronics Center (IMEC) in Leuven, Belgium, he also commenced studies of photoresist chemistry. Dr. Frank is an author or coauthor of more than 40 papers and one patent. In 2000, he received the Otto Hahn Medal for outstanding scientific achievements.

Evgeni P. Gusev QUALCOMM MEMS Technologies, 2581 Junction Avenue, San Jose, California 95134. Dr. Gusev received his M.S. (applied physics/molecular physics) and Ph.D. (solid-state physics) degrees from the Moscow Engineering Physics Institute (MEPhI) in 1988 and 1991. After graduation, he worked at MEPhI as a Research Associate for two years. In 1993, he joined the Laboratory for Surface Modification at Rutgers University, where he performed research on fundamental aspects of gate dielectrics, first as a Postdoctoral Fellow and then as a Research Assistant Professor. In 1997, he held an appointment as Visiting Professor at the Research Center for Nanodevices and Systems, Hiroshima University, Japan. Dr. Gusev subsequently joined IBM, where he was responsible for several projects related to gate stack processing, characterization, and device integration at both the Semiconductor Research and Development Center (SRDC) in East Fishkill, New York, and the Thomas J. Watson Research Center in Yorktown Heights, New York. In 2005 he joined the QUALCOMM Technology Development Center in San Jose as the Director of the Department of Materials and Device Research and Development. Dr. Gusev has also contributed to the technical R&D community, with nine edited books, more than 140 publications, and 20 issued and filed patents. He is a member of several professional committees, panels, and societies.

Jack O. Chu IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (chujus.ibm.com). Dr. Chu received a B.S. degree in chemistry from Princeton University in 1978, and M.S. and Ph.D. degrees in chemistry from Columbia University in 1980 and 1984, respectively. He joined the IBM Thomas J. Watson Research Center as a Postdoctoral Fellow in 1986 and later became a Research Staff Member. He was involved in the development and application of techniques to fabricate metastable silicon alloys and strained silicon structures for applications in high-performance bipolar and field-effect devices. He developed a novel low-temperature manufacturing process for growing high-performance SiGe:C HBTs which has enabled current bipolar devices to achieve higher-speed performances (greater than 200 GHz). He also pioneered early work on strained Si FETs and was the first to demonstrate a SiGe-on-insulator (SGOI) or a strained-Si-on-insulator (SSOI) substrate by wafer bonding; he has made major contributions to this field. His current efforts are on the development of high-performance, low-power CMOS logic technologies based upon channel doping and S/D stress engineering in CMOS devices on PDSOI or UTSOI substrates. He has authored and co-authored more than 165 publications, including a book chapter in the microelectronics field; he holds more than 50 related U.S. patents. Dr. Chu received an IBM Research Division Award for his work on understanding silylene gas-phase dynamics and an IBM Outstanding Technical Achievement Award for his work on high-mobility electron and hole transport in SiGe structures. In 2006 he became a Master Inventor.

Stephen W. Bedell IBM Systems and Technology Group, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (bedellsus.ibm.com). Dr. Bedell received his Ph.D. degree in physics from the State University of New York at Albany in 1999 and studied the basic physics of hydrogen-induced layer transfer. He went on to serve as Manager and subsequently Director of Strategic Technology for Silicon Genesis Corporation, a U.S.-based bonded SOI company based in Campbell, California. He now works at the IBM Thomas J. Watson Research Center developing advanced semiconductor substrates for high-performance CMOS applications. His interests include strained-layer physics, ion–solid interactions, and advanced semiconductor materials.

Kathryn W. Guarini IBM Corporate Division, 294 Route 100, Somers, New York 10598 (kwgus.ibm.com). Dr. Guarini is currently on assignment in IBM Corporate Technology, working on technical assessments for the IBM Technology Team. Before that, she was a Research Staff Member and Manager of the 45-nm Front End Integration group in the Silicon Technology Department at the IBM Thomas J. Watson Research Center. Her research included CMOS device fabrication, three-dimensional integrated circuits, and novel nanofabrication techniques and applications. Dr. Guarini joined the IBM Research Division in 1999 after completing her Ph.D. degree in applied physics at Stanford University.

Meikei Ieong IBM Research Division, 2070 Route 52, Hopewell Junction, New York 12533 (mkieongus.ibm.com). Dr. Ieong received the B.S. degree in electrical engineering from the National Taiwan University, Taiwan, R.O.C., and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Massachusetts, Amherst, in 1993 and 1996, respectively. Since joining IBM in 1995, he has held numerous management and engineering positions in both the research and development organizations. He is currently Senior Manager of the FEOL integration group at the IBM Thomas J. Watson Research Center, Yorktown Heights, New York. His departments are responsible for the 32-nm FEOL integration and metal-gate high-k projects. He is also project leader for the AMD/IBM Research Alliance and the Sony/Toshiba/IBM Research Alliance. Dr. Ieong has published more than one hundred papers in journals and conference proceedings. He has more than fifty patents related to semiconductor technology issued or pending. He was elected a Master Inventor in the IBM Research Division in 2006. In 2001, Dr. Ieong held the position of Adjunct Associate Professor in the Department of Electrical Engineering at Columbia University. He is a committee member of the VLSI Technology Symposium and is also on the executive committee of the IEDM. Dr. Ieong has received an IBM Outstanding Technical Achievement Award, a Research Division Award, a Corporate Award, and two Supplemental Patent Awards.