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Scott Hanson Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (hansons eecs.umich.edu). Mr. Hanson received his B.S. degree in electrical engineering summa cum laude from the University of Michigan at Ann Arbor in 2004. He is currently pursuing his Ph.D. degree at the University of Michigan and is the recipient of a fellowship from the Semiconductor Research Corporation (SRC). Mr. Hanson's research is focused on the development of energy-optimal circuit design strategies, with a particular emphasis on subthreshold CMOS design techniques.
Bo Zhai Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (bzhai eecs.umich.edu). Mr. Zhai received his B.S. degree in microelectronics from Peking University, China, in 2002 and his M.S. degree in electrical engineering from the University of Michigan at Ann Arbor in 2004. He is currently a Ph.D. candidate in electrical engineering at the University of Michigan. Mr. Zhai is a research assistant in the Advanced Computer Architecture Laboratory at the University of Michigan, working with Prof. David Blaauw. His research focuses on low-power VLSI design.
Kerry Bernstein IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (kbernste us.ibm.com). Mr. Bernstein is a Senior Technical Staff Member at the IBM Thomas J. Watson Research Center. He is currently responsible for future product technology definition, performance, and application. He received his B.S. degree in electrical engineering from Washington University in St. Louis, joining IBM in 1978. He holds 50 U.S. patents and is a coauthor of three college textbooks and multiple papers on high-speed and low-power CMOS. Mr. Bernstein is currently interested in the area of high-performance, low-power advanced circuit technologies. He is a Senior Member of the IEEE, and is a staff instructor at RUNN/Marine Biological Laboratories, Woods Hole, Massachusetts.
David Blaauw Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (blaauw eecs.umich.edu). Dr. Blaauw received his B.S. degree in physics and computer science from Duke University in 1986, his M.S. degree in computer science from the University of Illinois, Urbana, in 1988, and his Ph.D. degree in computer science from the University of Illinois, Urbana, in 1991. He worked for the IBM Corporation as a Development Staff Member until August 1993. From 1993 until August 2001, he worked for Motorola, Inc. in Austin, TX, where he was the manager of the High Performance Design Technology group. Since August 2001, he has been on the faculty at the University of Michigan as an Associate Professor. Dr. Blaauw's work has focused on VLSI design and CAD, with particular emphasis on circuit design and optimization for high-performance and low-power designs. He was the Technical Program Chair and General Chair for the International Symposium on Low Power Electronics and Design in 1999 and 2000, respectively, and he was the Technical Program Co-Chair and member of the Executive Committee of the ACM/IEEE Design Automation Conference in 2000 and 2001.
Andres Bryant IBM Systems and Technology Group, 1000 River Street, Essex Junction, Vermont 05452 (bryanta us.ibm.com). Dr. Bryant received his B.S.E.E. degree from the University of Maine in 1982 and his Ph.D. degree in electrical engineering from Stanford University in 1986, joining IBM in Burlington, Vermont, that same year. His work areas have ranged from surface-acoustic-wave gas sensors and scanning tunneling microscopy to CMOS transistor design. He has also worked on DRAM transistor design and high-performance-logic transistor design. Dr. Bryant's current interests include energy-efficient, ultralow-voltage transistor and circuit design.
Leland Chang IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (lelandc us.ibm.com). Dr. Chang received his B.S., M.S., and Ph.D. degrees in electrical engineering and computer science in 1999, 2001, and 2003, respectively, from the University of California at Berkeley. He joined the IBM Thomas J. Watson Research Center in 2003 as a Research Staff Member in the area of silicon technology. He is currently bridging the gap between device fabrication and circuit design to confront issues concerning continued technology scaling and the introduction of new device structures. Dr. Chang's technical research has encompassed topics ranging from advanced silicon device technology and nonvolatile memory devices to RF MEMS. With colleagues at U. C. Berkeley and Advanced Micro Devices, he helped demonstrate the FinFET double-gate structure down to record gate lengths. With IBM researchers, he has worked to demonstrate SRAM cells at record small sizes and has proposed alternative cell designs to improve SRAM stability. He has authored or coauthored more than 35 technical papers.
Koushik K. Das IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (kkdas us.ibm.com). In 1998, Dr. Das received his B. Tech. (honors) degree in electronics and electrical communications engineering from the Indian Institute of Technology (IIT), Kharagpur, India, and his M.S. and Ph.D. degrees in electrical engineering from the University of Michigan at Ann Arbor in 2000 and 2003, respectively. At IIT in 1998, he won the President of India's Gold Medal for being the most outstanding undergraduate student among all branches of engineering and sciences. Dr. Das has been a Research Staff Member at the IBM Thomas J. Watson Research Center since 2003. His research interests include high-speed low-power VLSI circuit design, with an emphasis on SOI technology. Dr. Das has authored numerous papers and holds several U.S. patents. He is currently serving on technical program committees of the IEEE International System-on-Chip Conference, the ACM Great Lakes Symposium on VLSI, the IEEE International Conference on Microelectronic Systems Education, and the IBM Watson PAC2 conference. He has also served as session chair/co-chair in multiple ACM/IEEE conferences.
Wilfried Haensch IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (whaensch us.ibm.com). In 1981, Dr. Haensch received his Ph.D. degree from the Technical University of Berlin, Germany, in the field of theoretical solid-state physics. In 1984 he joined Siemens Corporate Research in Munich to investigate high-field transport in MOSFET devices, and in 1988 he joined the DRAM development team at the Siemens Research Laboratory to investigate new cell concepts. In 1990, he joined the DRAM alliance between IBM and Siemens to develop quarter-micron 64M DRAM. In this capacity, Dr. Haensch was involved with device characterization of shallow-trench bounded devices and cell-design concerns. In 1996, he moved to a manufacturing facility to build various generations of DRAM. His primary mission was to transfer technologies from development into manufacturing and to guarantee a successful yield ramp of the product. In 2001, he joined the IBM Thomas J. Watson Research Center to lead a group concerned with novel devices and applications. He is currently responsible for post-45-nm-node device design and its implication for circuit functionality.
Edward J. Nowak IBM Systems and Technology Group, 1000 River Street, Essex Junction, Vermont 05452 (ejnowak us.ibm.com). Dr. Nowak received his B.S. degree in physics in 1973 from M.I.T., and M.S. and Ph.D. degrees, also in physics, from the University of Maryland in 1975 and 1978, respectively. In 1981, following postdoctoral research at New York University, he joined IBM in Essex Junction, Vermont, to work on DRAM development. Since 1985, Dr. Nowak has worked in high-performance CMOS device design. His current interests include energy-driven device design and FinFET device architectures.
Dennis M. Sylvester Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (dennis eecs.umich.edu). Dr. Sylvester received his B.S. degree in electrical engineering summa cum laude from the University of Michigan in 1995. He received his M.S. and Ph.D. degrees in electrical engineering from the University of California at Berkeley in 1997 and 1999, respectively. After completing research with the Advanced Technology Group of Synopsys and Hewlett-Packard Laboratories, Dr. Sylvester joined the University of Michigan, where he is currently Associate Professor of Electrical Engineering and Computer Science. He has published numerous articles along with one book and several book chapters in his field of research, which includes low-power circuit design and design automation techniques, design-for-manufacturability, and on-chip interconnect modeling. Dr. Sylvester received an NSF CAREER award, the 2000 Beatrice Winner Award at ISSCC, a 2004 IBM Faculty Award, and several best paper awards and nominations. He has served on the technical program committees of numerous design automation and circuit design conferences and was general chair of two ACM/IEEE workshops. He is currently an Associate Editor for IEEE Transactions on VLSI Systems and IEEE Transactions on Computer-Aided Design. He also helped define the circuit and physical design roadmap as a member of the International Technology Roadmap for Semiconductors (ITRS) U.S. Design Technology Working Group from 2001 to 2003.
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