Peter A. Franaszek IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (pafus.ibm.com). Dr. Franaszek received the Ph.D. degree in electrical engineering from Princeton University in 1965. From 1965 to 1968, he was employed by Bell Laboratories; he joined the IBM Research Division in 1968. During the academic year 1973–1974, he was on sabbatical leave at Stanford University as Consulting Associate Professor of Computer Science and Electrical Engineering. His interests are in the general area of information representation and management, and computer system organization. Dr. Franaszek has received two IBM Corporate Awards for his work on codes for magnetic recording, an IBM Corporate Patent Portfolio Award for his contribution to the ESCON* architecture, and IBM Outstanding Innovation Awards for fragmentation-reduction algorithms, for network theory, for concurrency-control algorithms, for run-length-limited codes, for the 8B/10B code used in ESCON, Fibre Channel, and Gigabit Ethernet, and for compressed-memory machines. He is a member of the IBM Academy of Technology and a Master Inventor. He is a Fellow of the IEEE, and received the 1989 IEEE Emmanuel R. Piore Award for his contributions to the theory and practice of constrained channel coding in digital recording. In 2003, he received the ACM Paris Kanellakis Theory and Practice Award for his contributions to the theory and practice of such coding. Dr. Franaszek holds more than fifty patents and has published more than forty-five technical papers.

Luis A. Lastras-Montaño IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (lastraslus.ibm.com). Dr. Lastras-Montaño received the Ph.D. degree in electrical engineering from Cornell University in 2000; he received the B.Sc. degree from the School of Sciences (UASLP, Mexico). He joined the IBM Thomas J. Watson Research Center after receiving his graduate degree. His academic interests are in the field of information theory, specifically network lossy and lossless data compression. Other interests include large deviations, statistical inference, communication signal design, and foundational issues at the intersection of information theory and computing systems architecture. At IBM his contributions have included theoretical topics such as the performance analysis of multiple description codes, universal lossless compression algorithms, and non-asymptotic large deviations theory, as well as practical topics such as algorithms for low-complexity lossless compression, prefetching in microarchitectures, and the design and analysis of compressed memory systems.

Steven R. Kunkel IBM Systems and Technology Group, 3605 Hwy. 52 N, Rochester, Minnesota 55901 (srkunkelus.ibm.com). Dr. Kunkel received his Ph.D. degree from the University of Wisconsin at Madison in 1987. He then joined IBM in Endicott, New York, doing performance analysis of a vector facility for a mid-range System/390* product. In 1989, he transferred to the IBM Rochester, Minnesota, site where he currently works. During most of his years in Rochester, he did architecture and performance analysis for AS/400* and RS/6000* (now called iSeries* and pSeries*) products. This included such areas as NUMA, VLIW, caches, MP cache coherency, multithreading, and converting AS/400 to PowerPC* architecture processors. Dr. Kunkel is currently a Senior Technical Staff Member; he continues to do architecture and performance analysis for iSeries, pSeries, and zSeries* servers.

Aaron C. Sawdey IBM Systems and Technology Group, 3605 Hwy. 52 N, Rochester, Minnesota 55901 (sawdeyus.ibm.com). Dr. Sawdey received his Ph.D. degree from the University of Minnesota in 1997. From 1997 to 1999 he worked for SGI/Cray in Eagan, Minnesota, on debuggers, application performance analysis software, and parallel processing libraries. In 1999 he joined IBM in Rochester, Minnesota, where he does cache and SMP interconnect analysis for PowerPC processors used in the iSeries and pSeries products.

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