Balaram Sinharoy IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (balaram@us.ibm.com). Dr. Sinharoy is a Distinguished Engineer in the IBM Systems and Technology Group. He has been the Chief Scientist for the POWER5 microprocessor design, responsible for the POWER5 microarchitecture definition. Prior to his work on the POWER5 microprocessor, he led many architecture, microarchitecture, performance and verification efforts for the POWER4 microprocessor. His research and development interests include advanced microprocessor design, computer architecture, and performance analysis. Dr. Sinharoy has published numerous articles and received numerous patents in these areas. He received an IBM Outstanding Technical Achievement Award, an IBM Outstanding Innovation Achievement Award, and an IBM Corporate Award for his contributions to POWER4 and POWER5 microprocessors, as well as an IBM Fourteenth Plateau Invention Achievement Award and an IBM Fourth Plateau Publication Achievement Award. Dr. Sinharoy is a Senior Member of IEEE and has been named an IBM Master Inventor.

Ronald N. Kalla IBM Systems and Technology Group, 11400 Burnet Road, Austin, Texas 78758 (rkalla@us.ibm.com). Mr. Kalla is the lead engineer for IBM POWER5, specializing in processor core development. He has designed processor cores for S/370*, M68000, AS/400*, and RS/6000* machines. He received an IBM Outstanding Innovation Award and an IBM Corporate Award for his contributions to the POWER5 system. Mr. Kalla holds numerous patents on processor architecture. He also has an extensive background in post-silicon hardware bring-up and verification. He has 12 issued U.S. patents, with 15 additional patents pending, and has published 15 technical disclosures.

Joel M. Tendler IBM Systems and Technology Group, 11400 Burnet Road, Austin, Texas 78758 (jtendler@us.ibm.com). Dr. Tendler is program director of technology assessment, responsible for assessing emerging technologies for applicability in future eServer* iSeries* and pSeries* product offerings. He has extensive hardware and software design experience in S/390* and RS/6000 systems. Most recently, Dr. Tendler received an IBM Outstanding Technical Achievement Award for his contribution to POWER4 and POWER5 systems. He has several U.S. patents issued and has received an IBM First Plateau Invention Achievement Award.

Richard J. Eickemeyer IBM Systems and Technology Group, 3605 Highway 52 N., Rochester, Minnesota 55901 (eick@us.ibm.com). Dr. Eickemeyer is a Senior Technical Staff Member in the IBM Systems and Technology Group. He is currently the processor core performance team leader for the IBM PowerPC servers. Prior to this, he worked on performance and architecture of several processors used in AS/400 systems and S/390 systems in Rochester, Minnesota, and Endicott, New York. Since joining IBM, he has received awards including a Ninth Plateau IBM Invention Achievement Award, an IBM Outstanding Technical Achievement Award, two IBM Outstanding Innovation Awards, and IBM Corporate Awards. He has also been named an IBM Master Inventor. Dr. Eickemeyer received the B.S. degree in electrical engineering from Purdue University and the M.S. and Ph.D. degrees from the University of Illinois at Urbana–Champaign. His research interests are computer architecture and performance analysis. He is a Senior Member of the IEEE.

Jody B. Joyner IBM Systems and Technology Group, 11400 Burnet Road, Austin, Texas 78758 (joyner@us.ibm.com). Mr. Joyner is a Senior Engineer in the IBM Systems and Technology Group in Austin, Texas. He received a B.S.E.E. degree (1993) and an M.S.E.E. degree (1999) from the University of Texas at Austin. He has specialized in the logic design of high-performance system bus interconnects in the POWER4 and POWER5 programs, along with their follow-ons. He led the hardware bring-up and validation efforts for the POWER5 storage subsystem. Mr. Joyner recently received an IBM Outstanding Innovation Achievement Award and an IBM Corporate Award for his contribution to the POWER5 microprocessor. He was named an IBM Master Inventor in 2000 and has received an IBM Twelfth Plateau Invention Achievement Award.

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