Biographical sketches of authors

Timothy J. Slegel IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (slegel@us.ibm.com). Mr. Slegel received his B.S.E.E. and M.S.E.E. degrees from Lehigh University in 1980 and 1982, respectively, joining IBM in 1982. He has worked in many areas of processor design, including floating-point units, vector processors and cache design. He was the chief architect and overall team leader for the G5 and z990 microprocessors. Mr. Slegel has received an IBM Corporate Award, two IBM Outstanding Innovation Awards, two IBM Outstanding Technical Achievement Awards, and a Ninth-Plateau IBM Invention Achievement Award with 36 U.S. patents. He is a Distinguished Engineer, currently working on the design of future IBM systems.

Erwin Pfeffer IBM Systems and Technology Group, IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (pfeffer@de.ibm.com). Mr. Pfeffer studied electrical engineering at the Johannes-Kepler-Polytechnikum in Regensburg, Germany, receiving his graduate degree in 1971 and joining IBM the same year. He worked in areas in printer and inspection tool development before joining microcode development in the S/390 processor group in 1984. In 1993 he moved to the CMOS processor design group and was responsible for the design of the execution unit. Since 1998 he has been working on the TLB2 and Programmable Translator design. Mr. Pfeffer has received an IBM Outstanding Innovation Award, two IBM Outstanding Technical Achievement Awards, two IBM Exceptional Achievement Awards, and a 6th-Plateau IBM Invention Achievement Award.

Jeffrey A. Magee IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (jm5@us.ibm.com). Mr. Magee received his B.S. degree in electrical, computer, and systems engineering from Rensselaer Polytechnic Institute and joined IBM in 1998. He previously worked in cache design and was the lead engineer on the cryptographic coprocessor for the z990 system. He presented this work at the Hot Chips conference in 2002 and has filed a patent application on the concept. Currently Mr. Magee is working on high-performance interfaces for a future IBM microprocessor.