Biographical sketches of authors

Pak-kin Mak IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (pmak@us.ibm.com). Mr. Mak is a Distinguished Engineer in zSeries custom hardware design. He received his B.S.E.E. degree from the Polytechnic Institute of New York and his M.B.A. degree from Union College. Mr. Mak joined IBM Poughkeepsie in 1981, working on the ES/3090 BCE cache design. He has designed high-end system controllers and L2 caches for ES/9021 bipolar-based systems, and he was the lead architect for the S/390 G4, G5, G6, z900, and z990 processor storage/cache subsystem designs. Mr. Mak currently holds 14 patents; he has received six IBM Invention Achievement Awards, three IBM Outstanding Innovation Awards, three IBM Outstanding Technical Achievement Awards, and two IBM Division Awards.

Gary E. Strait IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (strait@us.ibm.com). Mr. Strait is an Advisory Engineer in eServer Hardware Development. He was the logic team leader for the z990 SCE I/O interface. He joined IBM in 1980 after receiving his B.S. and M. Eng. degrees in electrical engineering from Rensselaer Polytechnic Institute. Mr. Strait previously held design positions on the storage subsystem of the IBM ES/3090, ES/9021 subsystems, and the I/O interface of the S/390 G4, G5, G6, and z900 systems. He has received four IBM formal awards, holds four U.S. patents, and has three patents pending.

Michael A. Blake IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (mablake@us.ibm.com). Mr. Blake joined IBM in 1981 after receiving his B.S. degree in electrical engineering from Rensselaer Polytechnic Institute. He is a Senior Technical Staff Member in eServer Hardware Development, and was the overall logic team leader for the z990 SCE, as well as lead ring unit designer. He previously held design and team leader positions on the IBM ES/3090, ES/9021, S/390 G4, G5, G6, and z900 systems. Mr. Blake has received several IBM formal awards, including two IBM Outstanding Technical Achievement Awards, two IBM Outstanding Innovation Awards, and an IBM Corporate Award for his work on the z900 SCE. Mr. Blake currently holds four U.S. patents and has seven patents pending.

Kevin W. Kark IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (kark@us.ibm.com). Mr. Kark received his B.E.E.E. degree from the City College of New York in 1983 and his M.S.C.E. degree from Syracuse University in 1989. He joined IBM in 1983 at the IBM Product Development Laboratory in Poughkeepsie in the storage subsystem organization. Mr. Kark is a Senior Engineer in eServer Hardware Development and has held various design and team leader positions on the IBM ES/9000 and IBM S/390 CMOS G3, G4, G5, G6, z900, and z990 systems. He was the logic team leader for the z990 main storage controller. Mr. Kark has received several IBM formal awards, including three IBM Outstanding Technical Achievement Awards, an IBM Outstanding Innovation Award, an IBM Division Award, and an IBM President Award (Europe). He currently holds three U.S. patents and has two patents pending and several publications.

Vesselina K. Papazova IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (papazova@us.ibm.com). Mrs. Papazova is an Advisory Engineer in eServer Hardware Development. She was responsible for the memory interface logic design for the z990 SCE and was a designer on the ring unit. She received her M.S. degree in electrical engineering from the Technical University, Sofia, Bulgaria, in 1995. From 1995 to 1998 Mrs. Papazova worked as a microprocessor system designer for ROCON, LCC. In 1998 she joined the Sigma-Delta Corporation in Bulgaria, where she was responsible for I/O unit logic design for single-chip microcontrollers. In 2000, she joined IBM upon her arrival in the United States. Mrs. Papazova has one pending patent.

A. E. (Rick) Seigler IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (seigler@us.ibm.com). Mr. Seigler joined IBM Poughkeepsie in 1980 after receiving B.S.E.E. and M.S.E.E. degrees from Rensselaer Polytechnic Institute. He worked as a logic designer and systems test engineer on ES/3090 systems, and as a recovery/serviceability systems test manager for ES/3090 and ES/9021 systems. In 1992 he joined S/390 Custom Hardware Design, where he now works as an Advisory Engineer; prior to that, he served one year on an IBM Faculty Loan assignment at the Georgia Institute of Technology in Atlanta. He was the z990 SCE test floor leader following his assignment as a logic designer on the ring unit. Mr. Seigler holds seven patents and has four patents pending; he has received IBM Outstanding Technical Achievement Awards for his work on the G4, G5, G6, and z900 systems.

Gary A. Van Huben IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (vanhuben@us.ibm.com). Mr. Van Huben joined IBM in 1986 and is currently an SCE design team leader in eServer Hardware Development. He has held various design assignments involving the S/390 storage controller, central processor, and I/O subsystem. He served as the dataflow chip team leader for the z990 SCE in addition to his assignments as a logic designer on the ring unit. Mr. Van Huben also architected and supervised the data management methodology and processes used to develop the z990 CEC. In 1986, he graduated from Clarkson University with a B.S. degree in electrical and computer engineering; he currently holds 14 U.S. patents and has received five IBM Invention Plateau Awards, two IBM Outstanding Technical Achievement Awards, and an IBM Outstanding Innovation Award for his work on the z900.

Liyong Wang IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (liyongw@us.ibm.com). Mr. Wang is a Staff Engineer in eServer Hardware Development. He received an M.S. degree in electrical engineering from Rensselaer Polytechnic Institute and a B. S. degree in engineering physics from Tsinghua University, China. He joined IBM in 2000 after working for Pitney Bowes, Inc., as an ASIC engineer. Mr. Wang is a logic team member for the z990 MSC; he currently has one patent pending.

George C. Wellwood IBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (wellwd1@us.ibm.com). Mr. Wellwood joined IBM in 1963 in the thin-film memory development area. In 1969 he joined the S/360 Model 195 development team and has since remained in mainframe development. He was a designer on the S/370 Models 3032 and 3033. On the H series machines, he was a designer on the memory controller. On the G4, G5, and G6 CMOS machines, he was a designer on the L2 cache and memory subsystem. For the z900 and z990 machines, he was a designer on the memory controller. Mr. Wellwood was an Advisory Engineer in S/390 Custom SCE Design and is now a consultant to that team. He received IBM Outstanding Technical Achievement Awards for his work on S/390 G4 L2 cache development in 1997 and S/390 G5 cache and memory subsystem development in 1998. He holds two U.S. patents and has five publications.