Guenter GerwigIBM Server Group, IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (ggerwig@de.ibm.com). Mr. Gerwig received his B.S. and M.S. degrees in electrical engineering from the University of Stuttgart in 1978 and 1981, respectively. He joined IBM in 1981 to work on chip card readers for banking systems. Since 1989 he has worked on floating-point designs for CMOS microprocessors. He is the team leader responsible for the design of the G2, G3, z990, and a future floating-point unit. Mr. Gerwig received a third-plateau IBM Invention Achievement Award and holds 11 patents. He is currently the team leader responsible for a future recovery unit design.
Holger WetterIBM Server Group, IBM Deutschland Entwicklung GmbH, Schoenaichestrasse 220, 71032 Boeblingen, Germany (hwetter@de.ibm.com). Mr. Wetter received his M.S. degree in electrical engineering from the University of Hannover in 1995 and joined IBM the same year. Since then he has been working in the area of custom circuit design on several generations of zSeries microprocessors. In particular, he was involved in the design of the floating-point unit of the z990 microprocessor. Mr. Wetter is a coauthor of several publications and seven patents. He is currently working on floating-point units for future pSeries and zSeries microprocessors.
Eric M. SchwarzIBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (eschwarz@us.ibm.com). Dr. Schwarz received a B.S. degree in engineering science from Pennsylvania State University in 1983, an M.S. degree in electrical engineering from Ohio University in 1984, and a Ph.D. degree in electrical engineering from Stanford University in 1993. He joined IBM in 1984 in Endicott, New York, and in 1993 transferred to IBM Poughkeepsie. He is a Senior Technical Staff Member and was the z900 microprocessor logic design leader. Dr. Schwarz provides support to IBM floating-point unit teams and is on the program committee of the IEEE Symposium on Computer Arithmetic. He is also actively researching computer architecture and heads two IBM/CMU microarchitecture work groups. Dr. Schwarz is currently working on future microarchitectures for IBM zSeries, iSeries*, and pSeries processors. He is an author of many patents, conference proceedings, and technical reports.
Juergen HaessIBM Server Group, IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (haess@de.ibm.com). Mr. Haess received his M.S. degree in electrical engineering from the University of Karlsruhe in 1980. He joined IBM to work on I/O adapter development, which included several released products. In 1994 he spent six months at IBM Poughkeepsie, where he facilitated the transfer of the G3 FIB-chip design to that location. He also coordinated this new I/O system with the Boeblingen I/O designs. In 1997 he joined the CPU development team, where he became a member of the floating-point unit team. He was responsible for the design of the z990 new binary fused multiply-and-add instructions. He is currently working in FPU design on binary instructions for the next IBM pSeries and zSeries processors. Mr. Haess is an author or coauthor of several patents, a conference proceeding, and two journal articles. He has received a number of awards for his work, including three IBM Invention Achievement Awards.
Christopher A. KrygowskiIBM Systems and Technology Group, 2455 South Road, Poughkeepsie, New York 12601 (cakryg@us.ibm.com). Mr. Krygowski received a B.S. degree in electrical engineering from Clarkson University in 1989 and an M.S. degree in electrical engineering from the National Technological University. He is currently a Senior Development Manager leading microprocessor development for future zSeries systems. Mr. Krygowski joined IBM in 1989 and has had various design and management responsibilities in development of the IBM zSeries central processor units. His recent contributions are the design of the integer and floating-point execution units of the z990 processor. He is the author of 17 patents and several technical articles. Mr. Krygowski has received four IBM Outstanding Technical Achievement Awards for his work on IBM zSeries processors.
Bruce M. FleischerIBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (fleischr@us.ibm.com). Dr. Fleischer is a Research Staff Member in the VLSI Design Department at the IBM Thomas J. Watson Research Center. He received his A.B. degree in physics from Harvard University in 1981, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1987 and 1989, respectively. He joined the IBM Research Division in 1989 to do BiCMOS circuit design. From 1989 to 1992 he worked on BiCMOS SRAM and communications circuits. Since 1992, he has worked on microprocessor circuit design. Dr. Fleischer was a member of the floating-point team for the z900 microprocessor, and the lead circuit designer for the z990 microprocessor floating-point unit. He is the author or coauthor of a textbook chapter, several technical articles, and eight patents. Dr. Fleischer received an IBM Outstanding Technical Achievement Award for his work on the G7 (z990) microprocessor.
Michael KroenerIBM Server Group, IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (mkroener@de.ibm.com). Mr. Kroener received his B.S. degree in communications engineering from the Fachhochschule fuer Technik in Esslingen in 1994. He joined IBM in 1994 to work on the design and verification of floating-point designs for CMOS microprocessors. In 1999 Mr. Kroener began an assignment at IBM Poughkeepsie, New York, where he joined the Fixpoint Development Team for G4. In 2001, he was invited to the IBM Academy, where he presented the most recent floating-point design. He is the author of four patents and several technical articles. Mr. Kroener recently became a floating-point representative in the IBM Development Team in Austin, where he is responsible for integrating the actual floating-point design into the pSeries microprocessor.
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