Biographical sketches of authors

Randy W. Mann IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (rmann@us.ibm.com). Mr. Mann is a Senior Engineer in Technology Development and Process Integration; he received his B.S. degree from the University of North Carolina at Greensboro and his M.S. degree from the University of Notre Dame in 1982. In 1982 he joined IBM in Essex Junction, Vermont, where he has worked in technology development on high-performance CMOS logic, embedded DRAM, and both embedded and standalone SRAM applications. He currently holds more than 40 patents and has authored or co-authored more than 30 technical papers across a range of topics related to microelectronics. In 2001 he received an IBM Corporate Award for his work on titanium silicides; he has more recently worked on dense SRAM in the development of ultralow-power technologies. He is currently located in East Fishkill, New York, where he is working in the IBM SRDC on the development of the high-performance 65-nm-node CMOS technology.

W. W. (Bill) Abadeer IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (abadeer@us.ibm.com). Dr. Abadeer is a Senior Engineer with the Quality and Reliability Engineering group at the Burlington facility of the IBM Microelectronics Division. He joined IBM at the Burlington facility in 1976, and has since worked on the reliability of semiconductor devices. Dr. Abadeer received his M.S. and Ph.D. degrees in electrical engineering in 1970 and 1976, respectively, from the University of Vermont. From 1968 to 1976, Dr. Abadeer received teaching and research fellowships at the University of Vermont. Dr. Abadeer is a member of the IEEE and of the Electrochemical Society; he has several publications and patents

Matthew J. Breitwisch IBM Microelectronics Division, 1000 River Road, Essex Junction, Vermont 05452 (breitm@us.ibm.com). Dr. Breitwisch is an Advisory Engineer in the Compact Modeling group at the IBM Microelectronics Center. He received a B.S. degree in physics, mathematics, and astrophysics from the University of Wisconsin at Madison in 1994, and a Ph.D. degree in physics from Iowa State University in 1999. He subsequently joined IBM at the IBM Microelectronics Center, where he has worked on developing low-standby-power SRAM. He is currently working on dc and RF compact models for CMOSFETs and passive devices. Dr. Breitweisch is an author or coauthor of one patent and ten technical papers

O. Bula (no longer with IBM)

Jeff S. Brown IBM Microelectronics Division, Burlington facility, 1000 River Essex Junction, Vermont 05452 (brownjs@us.ibm.com). Mr. Brown is an Advisory Engineer with the Device Modeling and Simulation Department. He received his B.S. and M.S. degrees in electrical engineering from the Georgia Institute of Technology in 1990 and 1992, respectively. He subsequently joined IBM in Essex Junction, Vermont, working in CMOS characterization. In 1995, Mr. Brown joined the Technology Development group in Essex Junction, working on device design for foundry and low-power technologies; since 2002, he has worked in modeling and simulation.

Bryant C. Colwill IBM Microelectronics Division, East Fishkill facility, Route 52, Hopewell Junction, New York 12533 (bcolwill@us.ibm.com). Mr. Colwill received a B.S. degree in chemical engineering from the Rensselaer Polytechnic Institute in 2000. He subsequently joined the IBM Microelectronics Division in Essex Junction, Vermont, focusing on low-power CMOS device isolation. Currently, Mr. Colwill is a Staff Engineer working on FEOL yield enhancements for silicon and silicon-on-isolation technologies at the IBM 300-mm production facility in East Fishkill, New York.

Peter E. Cottrell IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (pcottrel@us.ibm.com). Dr. Cottrell received his B.S., M.E., and Ph.D. degrees from the Rensselaer Polytechnic Institute in 1968, 1970, and 1973. He has been an engineer and manager in the IBM Microelectronics Division since then. While at IBM he has contributed to the development of DRAM, CMOS, and BICMOS technologies with a focus on device design, simulation, and modeling, as well as reliability. He has authored more than 30 technical papers and holds eight patents. Dr. Cottrell is currently responsible for developing devices and models for new BiCMOS technologies for wireless applications at IBM. He also is a Distinguished Engineer, an IEEE Fellow, and a member of the IBM Academy.

William G. Crocco, Jr. 115 S. Quarry Street, Ithaca, New York 14850 (crocco@alum.rpi.edu). Mr. Crocco has a B.S. degree in electrical engineering from Rensselaer Polytechnic Institute. He is currently a graduate student in electrical and computer engineering at Cornell University. He was a summer intern in the IBM Microelectronics Division at Essex Junction, Vermont, where he worked on CMOS leakage in 2001 and ASICs in 2002

Stephen S. Furkay IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (ssf@us.ibm.com). Mr. Furkay is an Advisory Engineer in the SiGe Predictive Modeling group at the Essex Junction, Vermont, facility, working on various aspects of technology CAD. He received B.S. and M.S. degrees in mechanical engineering from Pennsylvania State University in 1976 and 1979, respectively, and the M.S. degree in mathematics from the University of Vermont in 2001. Mr. Furkay received an IBM Outstanding Technical Achievement Award in 2001 and an IBM Corporate Award in 2002 for his work on the FIELDAY semiconductor device simulation program. He is the author or coauthor of five patents and more than 20 technical papers.

Michael J. Hauser IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (hauserm@us.ibm.com). Mr. Hauser is a Staff Engineer in the Technology Reliability Department at the IBM Essex Junction, Vermont, facility. He received a B.S. degree in electrical engineering from Purdue University in 1999, subsequently joining the IBM Microelectronics Division in Essex Junction, where he began work on technology qualifications. In 2000 he assumed responsibility for device reliability simulation. Mr. Hauser is a member of the Institute of Electrical and Electronics Engineers.

Terence B. Hook IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (tbhook@us.ibm.com). Dr. Hook received the Sc.B. degree from Brown University in 1980, joining IBM in East Fishkill, New York, that same year and moving to Essex Junction, Vermont, in 1981. He attended Yale University under the auspices of the IBM Resident Study Program and completed his Ph.D. in 1986. Since returning to IBM, he has worked on bipolar, BiCMOS, and CMOS device design and process integration. He has also worked extensively in the field of plasma charging damage and served as Chair of the 7th Annual Symposium on Plasma- and Process-Induced Damage in 2002. Dr. Hook currently divides his time between Essex Junction and East Fishkill, working on 90-nm CMOS development. He is the author of more than three dozen technical publications and holds more than a dozen patents.

Dennis Hoyniak IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (hoyniak@us.ibm.com). Mr. Hoyniak received the B.S. degree in electrical engineering and the M.S. degree in nuclear engineering from Pennsylvania State University in 1975 and 1977, respectively, and the M.S. in material science from the University of Vermont in 1997. In 1980 he joined IBM, where he has been engaged in the development of silicon-based devices. Mr. Hoyniak's current work interest is in the area of SRAM cell development.

James M. Johnson IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (jjohn@us.ibm.com). Dr. Johnson is an Advisory Engineer in the Device Modeling and Simulation Department at the IBM Essex Junction facility. He received his bachelor's degree from Marquette University, majoring in physics, mathematics, and philosophy, and his Ph.D. degree in physics from the University of Wisconsin at Madison in 1990. He subsequently joined Wayne State University as a postdoctoral fellow and then became an Assistant Professor (Research). His research there was mainly in the area of high-energy particle theory and included investigations of quarkonium, Higgs boson, and positronium formation. In 2001 Dr. Johnson joined IBM, where he works on TCAD device simulation and compact model development. He is a member of the Institute of Electrical and Electronics Engineers and the American Physical Society.

Chung Hon Lam IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (clam@us.ibm.com).

Rebecca D. Mih IBM Microelectronics Division, East Fishkill facility, Semiconductor Research and Development Center, Route 52, Hopewell Junction, New York 12533 (mih@us.ibm.com). Dr. Mih is Senior Manager of the Foundry Early User Hardware Group at the Semiconductor Research and Development Center (SRDC). She received B.S. and M.S. degrees in electrical engineering from Washington State University and Arizona State University, respectively, and a Ph.D. degree in materials science and engineering from the University of California at Berkeley in 1994. She subsequently joined IBM at the SRDC, where she has worked in the areas of advanced lithography, BEOL integration of low-k materials, flash memory, and early user hardware process integration and development. Dr. Mih is an author or coauthor of 27 patents and seven technical papers

J. Rivard (no longer with IBM)

Atsushi Moriwaki Yasu Semiconductor Corporation, 686-1, Ichimiyake, Yasu-Cho, Yasu-Gun, Shiga, Japan. Mr. Moriwaki received B.E. and M.E. degrees in applied mathematics and physics from Kyoto University, Japan, in 1982 and 1984, respectively. In 1984, he joined IBM Japan at the Japan Science Institute, Tokyo, where he worked on VLSI design methodology and parallel processing architecture. In 1993, he moved to the Yasu Technology Application Laboratory, Shiga, Japan, where he worked on synchronous DRAM design. From 1995 to 1998 and from 2000 to 2001, Mr. Moriwaki transferred to the IBM Microelectronics Division, working on CMOS device design at the IBM Burlington facility in Essex Junction, Vermont. In 2001, he moved to Yasu Semiconductor Ltd., where he has been working on device characterization

E. Phipps (no longer with IBM)

Christopher S. Putnam IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (putnamc@us.ibm.com). Mr. Putnam joined IBM in 1997 after completing the Master of Engineering degree in electrical engineering and computer science at the Massachusetts Institute of Technology. He currently works in the IBM Microelectronics Semiconductor Research and Development Center in Essex Junction, Vermont. While at IBM, he has focused on technology development activities, including functional characterization and yield learning. Mr. Putnam is currently working in the group responsible for characterization and implementation of electrostatic discharge protection on chips in the IBM advanced silicon and silicon-on-insulator semiconductor technologies.

BethAnn Rainey IBM Microelectronics Division, Burlington facility, 1000 River Road, Essex Junction, Vermont 05452 (barainey@us.ibm.com). Miss Rainey is a process development engineer with the Analog and Mixed Signal Technology Development group at the IBM Microelectronics Burlington facility. She received her B.S. degree in chemical engineering from Purdue University in 1997 and her M.S. degree in materials science and engineering from the University of Michigan in 2000. Since joining IBM in 2000, she has worked on advanced low-power CMOS, FinFET, and SiGe BiCMOS technology development. She has authored or coauthored five technical papers and six patent applications

James J. Toomey IBM Microelectronics Division, East Fishkill facility, Route 52, Hopewell Junction, New York 12533 (toomeyj@us.ibm.com).

Mohammad Imran Younus IBM Microelectronics Division, East Fishkill facility, Route 52, Hopewell Junction, New York 12533 (myounus@us.ibm.com). Mr. Younus is a Staff Engineer in the Characterization and Test Department at the IBM 300-mm manufacturing facility in Hopewell Junction, New York. He received a B.S. degree in industrial electronics from the Institute of Industrial Electronics Engineering (IIEE), Pakistan, in 1993 and an M.S degree in microelectronics from the University of Concordia, Montreal, Canada, in 2000. He subsequently joined the IBM facility in Essex Junction, Vermont, where he worked as a characterization engineer in the Ultralow-Power Technology development group. Mr. Younus has received an IBM Invention Achievement Award for his work on selective silicide blocking.