Biographical sketches of authors

James R. Allen, Jr. IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (jallenjr@us.ibm.com). Mr. Allen received a B.S. degree in electrical engineering from North Carolina State University in 1981. He joined IBM that same year and worked on the development of IBM communication controllers. He is currently a Senior Engineer working on network processor architecture. Mr. Allen holds several patents in the areas of networking and network processors. His professional interests include networking, network processors, wireless communications, and network security.

Brian M. Bass IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (bass@us.ibm.com). Mr. Bass is a Senior Engineer, working on network processing. He received an M.S. degree in electrical engineering from Clemson University in 1984. He is one of the original architects for the IBM PowerNP family of network processors and has worked on their architecture, design, and laboratory “bringup.” Mr. Bass has applied for more than 45 patents in the network processing and communication area.

Claude Basso IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (cbasso@us.ibm.com). Mr. Basso is a Distinguished Engineer, in charge of software architecture development for IBM network processors. He received an engineering degree in computer science from the Grenoble Polytechnic Institute, France. Since joining IBM in 1985, he has been involved in the definition and development of many products including communication controllers and ATM switches. Mr. Basso holds more than 40 patents in the networking field.

Richard H. Boivie IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (rhboivie@us.ibm.com). Dr. Boivie manages the Advanced Network Technologies Department at the Thomas J. Watson Research Center. He received B.S. and M.S. degrees in electrical engineering from Rensselaer Polytechnic Institute and a Ph.D. in computer science from the State University of New York at Stony Brook. Among other things, he was the technical lead and then manager of the group in IBM that developed the hardware and software for the NSFnet—the principal backbone of the Internet from 1988 to 1995 and the foundation for today's Internet. His interests include operating systems, networking, multicast, security, and cryptography.

Jean L. Calvignac IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (calvi@us.ibm.com). Mr. Calvignac is an IBM Fellow, currently responsible for the system design of IBM network processors. In 1998, at the IBM Research Triangle Park Laboratory, he and his team initiated the IBM network processor activities. He had previously been responsible for system design of the ATM switching products, which he initiated with his team in 1992 at the IBM La Gaude Laboratory in France. Before then, he had held different management and technical leader positions for architecture and development of the IBM communication controller products at the IBM La Gaude Laboratory. Mr. Calvignac joined IBM in 1971 as a development engineer in telephone switching products. He received an engineering degree in 1969 from the Grenoble Polytechnic Institute, France. He holds more than 120 patents in the field of communication and networking and has published more than 90 papers or contributions for standards. Mr. Calvignac is a Fellow Member of the IEE (in Europe) and a Senior Member of the IEEE.

Gordon T. Davis IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (gtdavis@us.ibm.com). Mr. Davis is a Senior Technical Staff Member, leading the Network Processor Performance team. He received a B.E.E. degree in electrical engineering from the Georgia Institute of Technology in 1971, and an M.S. degree in electrical engineering from U.C.L.A. in 1974. His expertise includes networking, network processors, performance, digital signal processing, and telecommunications. Mr. Davis is an author of three papers, more than 80 publications in the IBM Technical Disclosure Bulletin, 30 patents, and 48 pending patent applications.

Laurent Frelechoux IBM Research Division, Zurich Research Laboratory, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland (frl@zurich.ibm.com). Mr. Frelechoux is a researcher at the Zurich Research Laboratory. He received an M.S. degree in computer science from the Swiss Federal Institute of Technology of Lausanne, Switzerland, in 1996. His interests include networking and network processors, with a focus on mobile and wireless networking.

Marco Heddes TranSwitch Corporation, 3 Enterprise Drive, Shelton, Connecticut 06484 (mheddes@onexco.com). At the time this paper was written, Dr. Heddes was a Network Processor Architect with the IBM Microelectronics Division at Research Triangle Park, North Carolina. He received a Ph.D. degree in electrical engineering from the Eindhoven University of Technology, The Netherlands, in 1995. He joined the IBM Zurich Research Laboratory in Switzerland in 1990, working on switching technologies and VLSI design. In 1998, he transferred to the IBM Research Triangle Park Laboratory, where he made significant contributions to the development of IBM network processors. Dr. Heddes is an author of more than 60 patent applications in the switching and networking areas.

Andreas Herkersdorf IBM Research Division, Zurich Research Laboratory, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland (anh@zurich.ibm.com). Dr. Herkersdorf received a Dipl.-Ing. degree in electrical engineering from the Technical University of Munich, Germany, in 1987, and a Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology (ETH) in Zurich, Switzerland, in 1991. Since 1988, he has been with the Zurich Research Laboratory, where he currently manages the Network Processor Hardware group. Dr. Herkersdorf's areas of interests are high-speed communication networks and systems, and VLSI design methodologies.

Andreas Kind IBM Research Division, Zurich Research Laboratory, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland (ank@zurich.ibm.com). Dr. Kind is a Research Staff Member at the IBM Zurich Research Laboratory. He received a Ph.D. degree from the University of Bath (UK). Dr. Kind joined the Network Processor Software group at the Zurich Research Laboratory after working on next-generation converged service routers at the C&C Research Laboratories of NEC Europe. Since 1995, he has worked on open programmable networks.

Joe F. Logan IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (jflogan@us.ibm.com). Mr. Logan is a Senior Engineer, working on a team responsible for system design and architecture of IBM network processors. He received a B.S. degree in electrical engineering from Clemson University in 1983. In 1984 he joined IBM, where he has worked on the development of numerous components used in networking adapters, bridges, routers, and switches. He was part of the team that designed the first token-ring local area network adapter announced by IBM in 1985, and has designed components supporting other networking protocols such as Ethernet, FDDI, and ATM. His interests include networking, network processors, and high-speed bus architectures. Mr. Logan has received an IBM Outstanding Technical Achievement Award and an IBM Division Award; he is an author of more than ten patents.

Mohammad Peyravian IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (peyravn@us.ibm.com). Dr. Peyravian is a Network Processor Architect. He received a Ph.D. degree in electrical engineering from the Georgia Institute of Technology in 1992. His interests include networking, network processors, cryptography, security, and wireless telecommunications. Dr. Peyravian is an author of more than 40 journal and conference papers, and more than 30 patents.

Mark A. Rinaldi IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (nalds@us.ibm.com). Mr. Rinaldi is a Hardware/Software Engineer, currently working on software development tools for IBM network processors. He received an M.S.E.E. degree in electrical engineering from Rensselaer Polytechnic Institute in 1974. His interests include hardware and software architecture, software simulation, and language compilation.

Ravi K. Sabhikhi IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (sravi@us.ibm.com). Mr. Sabhikhi is a marketing manager in the Network Processor Architecture group of the IBM Microelectronics Division. He received an M.S. degree in computer science and an M.S. degree in business management, both from North Carolina State University. Mr. Sabhikhi has more than 25 years of experience in the networking industry as a developer, architect, and manager.

Michael S. Siegel IBM Microlectronics Division, Research Triangle Park, North Carolina 27709 (siegelm@us.ibm.com). Mr. Siegel is a Senior Technical Staff Member. He has been a network processor architect since 1997, providing major contributions to the development of the IBM PowerNP NP4GS3 architecture. Previously, he worked on the development of token ring switches, vector processing, and I/O channel development for IBM mainframes, and he was a coeditor of the 802.5 DTR token ring standard. In 1977 Mr. Siegel joined the IBM Large Systems Division in Poughkeepsie, New York, after receiving a B.S.E.E. degree from Rensselaer Polytechnic Institute. He holds patents in the fields of local area networks, network processors, vector processor design, and scalar processor design, and is a coauthor of “Understanding Token Ring Protocols and Standards,” published in 1998.

Marcel Waldvogel IBM Research Division, Zurich Research Laboratory, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland (mwl@zurich.ibm.com). Dr. Waldvogel is a Research Staff Member at the IBM Zurich Research Laboratory. He received a Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology (ETH), Zurich, in 2000. Before joining IBM, he was an Assistant Professor in Computer Science at Washington University in St. Louis. His research interests include algorithms and protocols for high-speed networking and data dissemination.