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IBM Journal of Research and Development  
Volume 46, Numbers 4/5, 2002
IBM eServer z900
 Table of contents: arrowHTML arrowPDF arrowASCII   This article: arrowHTML arrowPDF arrowASCII arrowCopyright info
   

IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology - Author bios

by B. W. Curran, Y. H. Chan, P. T. Wu, P. J. Camporese, G. A. Northrop, R. F. Hatch, L. B. Lacey, J. P. Eckhardt, D. T. Hui, and H. H. Smith

Biographical sketches of authors

Brian W. Curran   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (curranb@us.ibm.com). Mr. Curran is a Distinguished Engineer in the IBM Server Group. He received a B.S. degree in electrical engineering from University of Wisconsin and an M.S. degree in computer engineering from the National Technological University. Mr. Curran joined the IBM Large Systems Division in 1984 and has worked on ten zSeries (formerly S/390) bipolar and CMOS systems. He has held numerous design and technical leadership positions in memory system architecture, processor architecture and logic design, and high-frequency circuit design. Mr. Curran holds 22 U.S. patents and has co-authored many papers relating to microprocessor design. He received an IBM Corporate Award for S/390 CMOS high-frequency techniques and is currently an architect of a future (pSeries) eServer microprocessor.

Yuen H. Chan   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (chany@us.ibm.com). Mr. Chan is a Senior Technical Staff Member at the IBM Poughkeepsie Development Laboratory, working on custom VLSI circuit and SRAM designs. He received a B.S. degree in electrical engineering from Union College in 1977 and an M.S.E.E. degree from Syracuse University in 1984. He joined IBM at the East Fishkill, New York, facility in 1977, and has worked on high-performance bipolar, biCMOS, and CMOS logic and array development. Mr. Chan is currently a technical team leader of the zSeries microprocessor array design team. He has received an IBM Corporate Award for S/390 CMOS high-frequency techniques, and several IBM Outstanding Technical Achievement and Outstanding Innovation Awards for high-performance array development. He has reached the seventh IBM Invention Achievement Plateau. Mr. Chan has authored and coauthored many technical papers, and he holds 18 U.S. circuit patents. He is a member of the IEEE.

Philip T. Wu   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (ptwu@us.ibm.com). Mr. Wu received a B.S.E.E. degree from the University of Michigan in 1974, an M.S.E.E. degree from Stanford University in 1976, and an M.B.A. from Rensselaer Polytechnic Institute in 1994. Since joining IBM in 1976, he has been involved in all key areas related to VLSI circuit technology, test, and tools development. He is currently a Senior Technical Staff Manager at IBM Poughkeepsie, managing the chip technology and test strategies for the IBM eServer microprocessors. Mr. Wu has received seven U.S. patents and several technical disclosures in the field of integrated circuits and arrays. He is also a PMI Certified project manager.

Peter J. Camporese   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (pcamp@us.ibm.com). Mr. Camporese received a B.S. degree in electrical engineering from the Polytechnic Institute of New York in 1988 and an M.S. degree in computer engineering from Syracuse University in 1994. In 1998 he joined the IBM Data Systems Division in Poughkeepsie, New York, where he has worked on system performance, circuit design, physical design, and chip integration. He was the technical team leader for the physical design and integration of CMOS zSeries microprocessors (G4 and G7). Mr. Camporese is currently a Senior Engineer in the IBM Server Division working on integration of future CMOS pSeries microprocessors. He holds 12 U.S. patents and is a coauthor of several papers on high-speed microprocessor design.

Greg A. Northrop   IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (gnorth@us.ibm.com). Dr. Northrop received a Ph.D. degree in physics from the University of Illinois at Urbana–Champaign in 1982. In 1984 he joined the Physical Sciences Department of the IBM Research Division in Yorktown Heights, New York, and spent ten years doing optical spectroscopy of semiconductors. He then joined the Yorktown VLSI Design Department, where he has since worked on the Alliance series of microprocessors, leading the circuit design of the instruction unit for three years, as well as contributing to Server Division tools and methodology development. Dr. Northrop's technical interests include layout automation, library development, and synthesis and circuit optimization.

Robert F. Hatch   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (rfhatch@us.ibm.com). Mr. Hatch is a Senior Engineering Manager of a CAD application and methodology department in the IBM Server Group. He received a B.S. degree in engineering from Southern Illinois University and an M.S. degree in electrical engineering from Purdue University. Mr. Hatch joined IBM in 1978 at the East Fishkill facility, where he did custom PLA circuit design for a custom VLSI bipolar CPU chip set. His work has been in the areas of bipolar circuit design, MOS circuit design, macro design, VLSI chip design, and VLSI design tools. Mr. Hatch is currently working on the next generation of eServer processors.

Lisa Bryant Lacey   IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (lbl@us.ibm.com). Mrs. Lacey received a B.S. degree in computational mathematics from the Rochester Institute of Technology. She joined IBM in East Fishkill, New York, in 1988 and moved to the Thomas J. Watson Research Center in Yorktown Heights, New York, in 1995. She has worked first in simulation and then in logic synthesis.

James P. Eckhardt   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (jpe@us.ibm.com). In 1984 Dr. Eckhardt joined IBM, where he is now a Senior Technical Staff Member. He received a Ph.D. degree from the Georgia Institute of Technology in 1990 for his work in biCMOS circuit development. He has worked in the IBM eServer group for the past seven years designing PLLs for clock generation in microprocessors.

David T. Hui   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (huid@us.ibm.com). Mr. Hui received a B.E.E.E. degree from City College of New York in 1977 and an M.S.E.E. degree from the Polytechnic Institute of New York in 1979. He was with the Rockwell International Corporation in Ohio from 1977 to 1978. He joined IBM in 1979 and has since designed many I/O circuits and ESDs for bipolar high-end systems and CMOS large server systems. Mr. Hui has received four IBM Outstanding Technical Achievement Awards.

Howard H. Smith   IBM Server Group, 2455 South Road, Poughkeepsie, New York 12601 (smithh@us.ibm.com). Mr. Smith received B.S. and M.S. degrees in electrical engineering from the New Jersey Institute of Technology in 1984 and 1985, respectively. He joined IBM in 1984 as an integrated circuit engineer at the semiconductor development laboratory in East Fishkill, New York, working in the area of high-performance masterslice designs. Mr. Smith is currently a Senior Engineer in the IBM Server Group in Poughkeepsie, New York, where he is responsible for electrical analysis issues associated with high-density CMOS circuit technology and package-related products. His recent assignments include the development and coordination of on-chip noise verification processes for the eServer processor designs. His expertise lies in the area of system-level computer electrical noise modeling and prediction. Mr. Smith has co-authored papers on system-level noise prediction, on-chip interconnects, and electromagnetic characterization of connectors and antennas. He holds several patents on circuit designs and methodology techniques related to his area of expertise.