Biographical sketches of authors

James D. Meindl   Microelectronics Research Center, Georgia Institute of Technology, 791 Atlantic Avenue, NW, Atlanta, Georgia 30332 (james.meindl@mirc.gatech.edu). Dr. Meindl is the Director of the Joseph M. Pettit Microelectronics Research Center and the Joseph M. Pettit Chair Professor of Microelectronics at the Georgia Institute of Technology. He is also Director of the Interconnect Focus Center, a multi-university research effort managed jointly by the Microelectronics Advanced Research Corporation and the Defense Advanced Research Projects Agency for DoD. His current research interests focus on physical limits on gigascale integration. Dr. Meindl is a Life-fellow of IEEE and the American Association for the Advancement of Science, and a member of the American Academy of Arts and Sciences and the National Academy of Engineering and its Academic Advisory Board. He received his bachelor's, master's and doctor's degrees in electrical engineering from Carnegie Institute of Technology (Carnegie Mellon University).

Jeffrey A. Davis   Microelectronics Research Center, Georgia Institute of Technology, 791 Atlantic Avenue, NW, Atlanta, Georgia 30332 (jeff@ece.gatech.edu). Dr. Davis received the B.E.E., M.S.E.E., and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology in 1993, 1997, and 1999, respectively. He joined the faculty at Georgia Tech as an Assistant Professor in 1999. In June 2000, Dr. Davis received the best student paper award for the 1999 International Interconnect Technology Conference (IITC) for interconnect modeling and design exploration of gigascale integrated (GSI) systems. In January 2001 he received the National Science Foundation CAREER Award to explore novel alternatives to global interconnect design for future GSI systems. Dr. Davis is currently the general chair of the 2002 System Level Interconnect Prediction (SLIP) workshop (www.sliponline.org).

Payman Zarkesh-Ha   LSI Logic Corporation, 1551 McCarthy Boulevard, Milpitas, California 95035 (payman@lsil.com). Dr. Zarkesh-Ha is a Research Staff Member in the Interconnect Modeling Group in the Device Technology Division of LSI Logic Corporation. He received a B.S. degree in electrical engineering from the University of Science and Technology, Tehran, Iran, in 1992, an M.S. degree in electrical engineering from Sharif University, Tehran, Iran, in 1994, and a Ph.D. degree in electrical engineering from the Georgia Institute of Technology, Atlanta, in 2001. He subsequently joined LSI Logic Corporation, where he has worked on interconnect architecture design for the next ASIC generations. He is an author or coauthor of two patents and 25 technical papers. Dr. Zarkesh-Ha is a member of the Institute of Electrical and Electronics Engineers.

Chirag S. Patel   IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (pchirag@us.ibm.com). Dr. Patel is a Research Staff Member in the Science and Technology Department at the Thomas J. Watson Research Center. He received B.S., M.S., and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology in 1995, 1996 and 2001, respectively. In 2000 Dr. Patel received an outstanding paper award at the High Density Interconnect Conference for his work on the compliant wafer-level package. In 2001, he joined IBM at the Thomas J. Watson Research Center, where he has worked on advanced and exploratory packaging technologies. He is an author or coauthor of more than 25 technical papers. Dr. Patel is a member of the Institute of Electrical and Electronics Engineers.

Kevin P. Martin   Microelectronics Research Center, Georgia Institute of Technology, 791 Atlantic Avenue, NW, Atlanta, Georgia 30332 (kevin.martin@mirc.gatech.edu). Dr. Martin is a Senior Research Scientist in the Microelectronics Research Center at the Georgia Institute of Technology. He received his B.S. degree in 1976, his M.S. degree in 1979, and his Ph.D. degree in 1982, all in physics from Ohio State University. He has since held research positions at Boston University, the Francis Bitter National Magnet Laboratory at MIT, the University of Oregon, and Georgia Tech (where he has worked since 1987). His research activities include the integer and fractional quantum Hall effect, resonant tunneling in quantum-well nanostructures, physics of compound semiconductors, plasma processing of semiconductors, properties of semiconductor nanostructures, nanofabrication, wafer-level packaging, and high-performance ultrahigh-density input/output interconnects. Dr. Martin is an author and coauthor of more than 50 peer-reviewed journal papers and coinventor of six allowed patents. He has been a member of the American Physical Society, the American Vacuum Society, and the Institute of Electrical and Electronics Engineers.

Paul A. Kohl   Microelectronics Research Center, Georgia Institute of Technology, 791 Atlantic Avenue, NW, Atlanta, Georgia 30332 (paul.kohl@che.gatech.edu). Dr. Kohl received a Ph.D. degree from the University of Texas in 1978. He worked at AT&T Bell Laboratories from 1978 to 1989 in the area of materials and processes for semiconductor devices. In 1989, he joined the School of Chemical Engineering at the Georgia Institute of Technology, where he is currently Regents' Professor. His research interests include new materials and chemical processes for semiconductor and electrochemical devices.