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IBM Journal of Research and Development  
Volume 43, Numbers 5/6, 1999
IBM S/390 Server G5/G6
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The S/390 G5 floating-point unit - References

by E. M. Schwarz and C. A. Krygowski

References

  1. “IEEE Standard for Binary Floating-Point Arithmetic,” ANSI/IEEE Standard No. 754-1985, The Institute of Electrical and Electronics Engineers, Inc., New York, August 1985.
  2. IBM Corporation, Enterprise Systems Architecture/390 Principles of Operation, Order No. SA22-7201-05, September 1998; available through IBM branch offices.
  3. P. H. Abbott, D. G. Brush, C. W. Clark III, C. J. Crone, J. R. Ehrman, G. W. Ewart, C. A. Goodrich, M. Hack, J. S. Kapernick, B. J. Minchau, W. C. Shepard, R. M. Smith, Sr., R. Tallman, S. Walkowiak, A. Watanabe, and W. R. White, “Architecture and Software Support in IBM S/390 Parallel Enterprise Servers for IEEE Floating-Point Arithmetic,” IBM J. Res. Develop. 43, No. 5/6, 723­760 (1999, this issue).
  4. E. M. Schwarz, L. Sigal, and T. McPherson, “CMOS Floating-Point Unit for the S/390 Parallel Enterprise Server G4,” IBM J. Res. Develop. 41, No. 4/5, 475­488 (July/September 1997).
  5. D. E. Hoffman, R. M. Averill, B. Curran, Y. H. Chan, A. Dansky, R. Hatch, T. McNamara, T. McPherson, G. Northrop, L. Sigal, A. Pelella, and P. M. Williams, “Deep Submicron Design Techniques for the 500MHz IBM S/390 G5 Custom Microprocessor,” Proceedings of the 1998 International Conference on Computer Design, Austin, TX, October 1998, pp. 258­263.
  6. G. Northrop, R. Averill, K. Barkley, S. Carey, Y. Chan, Y. H. Chan, M. Check, D. Hoffman, W. Huott, B. Krumm, C. Krygowski, J. Liptay, M. Mayo, T. McNamara, T. McPherson, E. Schwarz, L. Sigal, T. Slegel, C. Webb, D. Webber, and P. Williams, “600MHz G5 S/390 Microprocessor,” International Solid-State Circuits Conference Digest of Technical Papers, February 1999, pp. 88­89.
  7. M. A. Check and T. J. Slegel, “Custom S/390 G5 and G6 Microprocessors,” IBM J. Res. Develop. 43, No. 5/6, 671­680 (1999, this issue).
  8. T. Slegel, R. Averill, M. Check, B. Giamei, B. Krumm, C. Krygowski, W. Li, J. Liptay, J. MacDougall, T. McPherson, J. Navarro, E. Schwarz, K. Shum, and C. Webb, “IBM's S/390 G5 Microprocessor,” presented at Hot Chips 10, Stanford, CA, August 1998.
  9. S. Vassiliadis and E. M. Schwarz, “Controlling Unit for a Pipelined Floating Point Hard-Wired Engine,” Proceedings of the IFIP Third International Workshop on Wafer Scale Integration, June 1989, pp. 343­351.
  10. E. M. Schwarz and C. Krygowski, “The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures,” Proceedings of the Fourteenth Symposium on Computer Arithmetic, Adelaide, Australia, April 1999, pp. 258­265.
  11. E. M. Schwarz, B. Averill, and L. Sigal, “A Radix-8 CMOS S/390 Multiplier,” Proceedings of the Thirteenth Symposium on Computer Arithmetic, Asilomar, CA, July 1997, pp. 2­9.
  12. S. Vassiliadis, E. M. Schwarz, and D. J. Hanrahan, “A General Proof for Overlapped Multiple-Bit Scanning Multiplications,” IEEE Trans. Computers 38, No. 2, 172­183 (February 1989).
  13. S. Vassiliadis, E. M. Schwarz, and B. M. Sung, “Hard-Wired Multipliers with Encoded Partial Products,” IEEE Trans. Computers 40, No. 11, 1181­1197 (November 1991).
  14. K. Hwang, Computer Arithmetic: Principles, Architecture and Design, John Wiley & Sons, Inc., New York, 1979.
  15. S. Waser and M. J. Flynn, Introduction to Arithmetic for Digital Systems Designers, CBS College Publishing, New York, 1982.
  16. E. M. Schwarz, T. McPherson, and C. Krygowski, “Carry Select and Input Select Adder for Late Arriving Data,” Proceedings of the 30th Asilomar Conference on Signals, Systems, and Computers, November 1996, pp. 182­185.
  17. R. E. Goldschmidt, “Applications of Division by Convergence,” Master's thesis, M.I.T., Cambridge, MA, June 1964.
  18. S. F. Anderson, J. G. Earle, R. E. Goldschmidt, and D. M. Powers, “The IBM System/360 Model 91: Floating-Point Execution Unit,” IBM J. Res. Develop. 11, No. 1, 34­53 (January 1967).
  19. S. Dao-Trong and K. Helwig, “A Single-Chip IBM System/390 Floating-Point Processor in CMOS,” IBM J. Res. Develop. 36, No. 4, 733­749 (July 1992).
  20. M. J. Flynn, “On Division by Functional Iteration,” IEEE Trans. Computers C-19, No. 8, 702­706 (August 1970).
  21. E. V. Krishnamurthy, “On Optimal Iterative Schemes for High-Speed Division,” IEEE Trans. Computers C-19, No. 3, 227­231 (March 1970).
  22. M. Darley, B. Kronlage, D. Bural, B. Churchill, D. Pulling, P. Wang, R. Iwamoto, and L. Yang, “The TMS390C602A Floating-Point Coprocessor for Sparc Systems,” IEEE Micro 10, No. 3, 36­47 (June 1990).
  23. C. V. Ramamoorthy, J. R. Goodman, and K. H. Kim, “Some Properties of Iterative Square-Rooting Methods Using High-Speed Multiplication,” IEEE Trans. Computers C-21, No. 8, 837­847 (August 1972).
  24. E. M. Schwarz, “Rounding for Quadratically Converging Algorithms for Division and Square Root,” Proceedings of the 29th Asilomar Conference on Signals, Systems, and Computers, October 1995, pp. 600­603.

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