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IBM Journal of Research and Development  
Volume 43, Numbers 5/6, 1999
IBM S/390 Server G5/G6
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The S/390 G5 floating-point unit - Author bios

by E. M. Schwarz and C. A. Krygowski

Biographical sketches of authors

Eric M. Schwarz   IBM Server Division, 522 South Road, Poughkeepsie, New York 12601 (eschwarz@us.ibm.com). Dr. Schwarz received a B.S. degree in engineering science from The Pennsylvania State University in 1983, an M.S. degree in electrical engineering from Ohio University in 1984, and a Ph.D. degree in electrical engineering from Stanford University in 1993. He joined IBM in 1984 in Endicott, New York, and in 1993 transferred to Poughkeepsie. Dr. Schwarz is a Senior Engineer; he was Execution Unit Logic Technical Leader for the G5 processor. Currently, he is the Central Processor Logic Technical Leader for follow-on microprocessors. His research interests are in computer arithmetic and computer architecture. He is the author of 18 filed patents, eight pending patents, and several journal articles and conference proceedings.

Christopher A. Krygowski   IBM Server Division, 522 South Road, Poughkeepsie, New York 12601 (cakryg@us.ibm.com). Mr. Krygowski received a B.S. degree in electrical engineering from Clarkson University in 1989 and an M.S. degree in electrical engineering from the National Technological University in Fort Collins, Colorado, in August 1999. He is an Advisory Engineer with the IBM Server Division in Poughkeepsie, New York. Mr. Krygowski joined IBM in 1989 and has had various logic design and simulation responsibilities in development of the IBM S/390 CMOS and bipolar central processor units. He is currently leading the logic design of the execution unit of a future S/390 CMOS microprocessor. His current research interests include floating-point arithmetic, high-frequency microprocessor design, and fault-tolerant computing. He is the author of one filed patent and one pending patent; Mr. Krygowski has received two IBM Outstanding Technical Achievement Awards.