Biographical sketches of authors
Joseph M. Hoke
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (jmhoke@us.ibm.com).
Mr. Hoke is an Advisory Engineer in the S/390 Connectivity Solutions Development group. He received the B.S. degree in electrical engineering from the University of Illinois at Chicago in 1987 and continued his studies under a university fellowship, receiving the M.S. degree in electrical engineering from Northwestern University in 1989. He joined IBM at Poughkeepsie, New York, in 1989 and has held various technical positions in S/390 I/O development. Mr. Hoke holds several patents used in IBM ESCON and sysplex products and has received two IBM Invention Achievement Awards. He has received an IBM Outstanding Technical Achievement Award for his work on ESCON and another for his contributions to the S/390 G5 Server.
Paul W. Bond
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (pwbond@us.ibm.com).
Mr. Bond is an Advisory Engineer in the Mid-Hudson Valley High-Performance Design Center. He received his B.S. degree in electrical engineering from Rensselaer Polytechnic Institute in 1972 and an M.E. degree in electrical engineering, also from Rensselaer Polytechnic Institute, in 1973. He joined IBM in Kingston, New York, in 1973. He is currently involved with the development of high-speed CMOS serial links.
Tin-chee (TC) Lo
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (tclo@us.ibm.com).
Mr. Lo received the M.S. degree in electrical engineering from Carnegie Mellon University. He joined IBM at East Fishkill, New York, in 1977, working on DRAM development projects. He became a Senior Engineer in 1984 and moved to IBM Poughkeepsie in 1985, working on assignments related to the design of System/390. Mr. Lo has engaged in different technical activities including bipolar and MOS device modeling, n-MOS and CMOS circuit design, static and dynamic memories, ABIST, and various logic design programs for high-end servers. His current interests are in high-speed interconnections and signal propagation. Mr. Lo holds 14 U.S. patents and has published numerous papers and invention disclosures in a variety of areas in the field of microelectronics and logic design. He has also received many technical awards during his career in IBM. Prior to joining IBM, he worked for American Micro-System and Fairchild Semiconductor, both in northern California.
Frank S. Pidala
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (pidala@us.ibm.com).
Mr. Pidala is a Staff Programmer Analyst in the Mid-Hudson Valley High-Performance Design Center. He joined IBM in East Fishkill, New York, in 1969. He is currently responsible for the physical design and release of self-timed interface (STI) macros. Mr. Pidala has received various recognition and informal awards, and more recently he received an IBM Outstanding Technical Achievement Award for his work on G5.
Gary Steinbrueck
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (steinbru@us.ibm.com).
Mr. Steinbrueck is a Senior Engineer in the Mid-Hudson Valley High-Performance Design Center. He received the B.S. degree in electrical engineering from the University of Missouri at Rolla in 1968. He joined IBM at East Fishkill, New York, and has held a wide variety of technical positions, including thermal engineering, advanced development of power devices, CMOS and bipolar memories, microprocessors, and packaging and product development of bipolar and CMOS logic circuits; he is currently responsible for the design of circuits for high-performance communication links for S/390, Power Parallel Systems, and OEM products. He has received many technical awards, including IBM Outstanding Technical Achievement Awards for his contributions to the IBM S/390 G3 and G5 systems.
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