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IBM Journal of Research and Development  
Volume 43, Numbers 5/6, 1999
IBM S/390 Server G5/G6
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Custom S/390 G5 and G6 microprocessors - References

by M. A. Check and T. J. Slegel

References

  1. P. R. Turgeon, P. Mak, M. A. Blake, M. F. Fee, C. B. Ford III, P. J. Meaney, R. Seigler, and W. W. Shen, “The S/390 G5/G6 Binodal Cache,” IBM J. Res. Develop. 43, No. 5/6, 661­670 (1999, this issue).
  2. C. F. Webb and J. S. Liptay, “A High-Frequency Custom CMOS S/390 Microprocessor,” IBM J. Res. Develop. 41, No. 4/5, 463­473 (July/September 1997).
  3. C. F. Webb, C. J. Anderson, L. Sigal, K. L. Shepard, J. S. Liptay, J. D. Warnock, B. Curran, B. W. Krumm, M. D. Mayo, P. J. Camporese, E. M. Schwarz, M. S. Farrell, P. J. Restle, R. M. Averill III, T. J. Slegel, W. V. Houtt, Y. H. Chan, B. Wile, T. N. Nguyen, P. G. Emma, D. K. Beece, T.-C. Ching, and C. Price, “A 400MHz S/390 Microprocessor,” IEEE J. Solid-State Circuits 32, No. 11, 1165­1175 (November 1997).
  4. Enterprise Systems Architecture/390 Principles of Operation, Order No. SA22-7201; available through IBM branch offices.
  5. T. J. Slegel, R. M. Averill III, M. A. Check, B. C. Giamei, B. W. Krumm, C. A. Krygowski, W. H. Li, J. S. Liptay, J. D. MacDougall, T. J. McPherson, J. A. Navarro, E. M. Schwarz, K. Shum, and C. F. Webb, “IBM's S/390 G5 Microprocessor Design,” IEEE Micro 19, No. 2, 12­23 (March/April 1999).
  6. D. E. Hoffman, R. M. Averill, B. Curran, Y. H. Chan, A. Dansky, R. Hatch, T. McNamara, T. J. McPherson, G. Northrop, L. Sigal, A. Pelella, and P. M. Williams, “Deep Submicron Design Techniques for the 500MHz IBM S/390 G5 Custom Microprocessor,” Proceedings of the 1998 International Conference on Computer Design (ICCD '98), Austin, TX, October 1998, pp. 258­263.
  7. K. Hua, A. Hunt, L. Liu, J.-K. Peir, D. Pruett, and J. Temple, “Early Resolution of Address Translation in Cache Design,” Proceedings of the 1990 International Conference on Computer Design (ICCD '90), Austin, TX, September 1990, pp. 408­412.
  8. E. M. Schwarz and C. A. Krygowski, “The S/390 G5 Floating-Point Unit,” IBM J. Res. Develop. 43, No. 5/6, 707­721 (1999, this issue).
  9. P. H. Abbott, D. G. Brush, C. W. Clark III, C. J. Crone, J. R. Ehrman, G. W. Ewart, C. A. Goodrich, M. Hack, J. S. Kapernick, B. J. Minchau, W. C. Shepard, R. M. Smith, Sr., R. Tallman, S. Walkowiak, A. Watanabe, and W. R. White, “Architecture and Software Support in IBM S/390 Parallel Enterprise Servers for IEEE Floating-Point Arithmetic,” IBM J. Res. Develop. 43, No. 5/6, 723­760 (1999, this issue).
  10. L. Spainhower and T. A. Gregg, “IBM S/390 Parallel Enterprise Server G5 Fault Tolerance: A Historical Perspective,” IBM J. Res. Develop. 43, No. 5/6, 863­873 (1999, this issue).

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