Biographical sketches of authors
Thomas Buechner
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (TBuechner@de.ibm.com).
Dr. Buechner received his M.S.E.E. degree from the University of Karlsruhe, Germany, in 1988, and the Ph.D. degree in computer science from the University of Stuttgart, Germany, in 1996. In 1993 he joined the IBM development laboratories in Boeblingen, Germany, where he is currently responsible for logic design and verification of complex and high-performance ICs for the IBM S/390 CMOS Parallel Enterprise Servers. His research interests include VLSI testing, formal verification, and computer-aided design methods. From 1989 to 1993 he worked as an R&D engineer at the Custom Processors and Test Department of the Institute for Microelectronics, Stuttgart, Germany, a federally funded ASIC design/fabrication/test center. During this time he was responsible for the design of several custom processors, and he did research on cost-effective test methods for semicustom ASICs. Dr. Buechner has been a member of the IEEE since 1989; he served as a technical committee member and session chair of the IEEE International ASIC Conference in 1996 and 1997, and as a program chair in 1998 and 1999.
Rolf Fritz
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (rfritz@de.ibm.com).
Mr. Fritz studied electrical engineering at the Fachhochschule Offenburg. In 1981, after four years with Wandel u. Goldermann developing measurement sets for telecommunications, he joined the IBM S/390 development laboratories in Boeblingen. Starting in a firmware department, he developed code for recovery and error reporting for various S/390 systems. In 1993 he joined the MBA hardware team, where he has been responsible for the design and in part for the verification of the sense and control logic.
Peter Guenther
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (pguenthe@de.ibm.com).
Mr. Guenther joined IBM in 1965 as a Field Engineer in the branch office at Hamburg. In 1969, he joined the IBM development laboratories in Boeblingen, where he has worked in many different areas, such as Bring-Up and Test, Tester Design, HW Design, System Test, and Simulation. Since 1990, he has been a member of the MBA team, where he leads the Input/Output subsystem verification team.
Markus Helms
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (helms@de.ibm.com).
Mr. Helms studied electrical engineering at the Berufsakademie Stuttgart, graduating in 1993. His studies were accompanied by practical training at IBM in Sindelfingen. In 1993 he joined the IBM laboratories in Boeblingen as an R&D engineer, responsible for design verification and simulation of I/O adapter chips for S/390 systems. Since 1996 he has worked on logic design; one of his responsibilities is the design of the event-monitoring unit described in this paper.
Kirk D. Lamb
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (kirklamb@us.ibm.com).
Mr. Lamb received a B.A. degree in English and German, summa cum laude, from Creighton University in 1980, a B.S.E.E. degree from Iowa State University in 1988, cum laude, and an M.S. degree in computer engineering from Syracuse University in 1993. He served in the Infantry of the U.S. Army from 1980 to 1984. In 1988 he joined IBM in Kingston, New York, where he worked as a digital logic designer for vector processors, memory subsystems, and cache subsystems. In 1994 he joined IBM Germany and designed part of the I/O subsystem of the S/390 system in Boeblingen. From 1996 to 1998 he managed the hardware design development tools department in Boeblingen. In 1998 he moved to IBM in Poughkeepsie, where he worked on SP adapter card development. Since February 1999 he has managed the Scalable Parallel Interconnection Design Department. Mr. Lamb is a professional engineer, registered in the state of Virginia.
Manfred Loew
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (loews@de.ibm.com).
Mr. Loew studied physics at the University of Frankfurt, joining the IBM S/390 development laboratories in Boeblingen in 1984. After two years in S/390 microcode tools development, he joined the S/390 I/O hardware team, where he is responsible for hardware verification.
Thomas Schlipf
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (schlipf@de.ibm.com).
Mr. Schlipf studied electrical engineering at the University of Karlsruhe. In 1985, after working for a time at the Robert Bosch Company, he joined the IBM S/390 development laboratories in Boeblingen. Since then he has been working on the hardware design of I/O chips and now leads the MBA team. Mr. Schlipf's interests are in the areas of computer architecture and formal verification. He is a member of the IEEE.
Manfred H. Walz
IBM Deutschland Entwicklung GmbH, Schoenaicherstrasse 220, 71032 Boeblingen, Germany (MHWalz@de.ibm.com).
Mr. Walz received the Dipl. Ing. degree in electrical engineering from the Berufsakademie in Stuttgart in 1979. In 1979 he joined the IBM development laboratories in Boeblingen, working on memory for the 43XX systems. From 1985 to 1995, Mr. Walz led several memory development projects. In 1996 he joined the I/O subsystem development team. He has led the MBA development for the CMOS G6 S/390 system. In addition, Mr. Walz has served as lecturer at the Berusfakademie in Stuttgart; he is a member of the IEEE.
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