Biographical sketches of authors
Robert M. Averill III
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (averillr@us.ibm.com).
Mr. Averill is a Senior Engineer in the S/390 Hardware Development Laboratory, Poughkeepsie, New York. In 1983 he joined IBM at the East Fishkill facility, where he developed advanced VLSI test equipment. He joined the Advanced CMOS Microprocessor group in Poughkeepsie in 1994 as a circuit designer and is currently the chip integration leader for microprocessors in IBM S/390 G5 and G6 Enterprise Servers. Mr. Averill received a B.S.E.E. degree from Northwestern University in 1983 and an M.S.E.E. degree from Syracuse University in 1990.
Keith G. Barkley
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (barkleyk@us.ibm.com).
Michael A. Bowen
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (bowenm@us.ibm.com).
Peter J. Camporese
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (pcamp@us.ibm.com).
Mr. Camporese is an Advisory Engineer in the Custom VLSI Processor Design group for S/390 hardware development. He received a B.S. degree in electrical engineering from Polytechnic University in 1988 and an M.S. degree in computer engineering from Syracuse University in 1991. Mr. Camporese joined the IBM Data Systems Division in 1988; since then he has worked on system performance, circuit design, physical design, VLSI chip integration, custom VLSI design methodology, and tools development. Most recently, he has been a technical team leader for the physical design and integration of S/390 custom CMOS microprocessors.
Allan H. Dansky
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (dansky@us.ibm.com).
Mr. Dansky received a B.S. degree from CCNY and an M.S. degree from Syracuse University, both in electrical engineering. He is a Senior Engineer with the IBM S/390 Division in Poughkeepsie, New York, now working on S/390 microprocessor chip wire routing, chip integration, hierarchical design methodology, and crosstalk analysis. He has written many software programs to integrate CAD tools, perform electrical checking across the design hierarchy, and calculate coupled noise between adjacent wires. From 1970 to 1992, Mr. Dansky worked on the design and evaluation of bipolar and BiCMOS circuits from five circuits to tens of thousands of circuits per chip. In the late 1970s, he performed the circuit design for a 5000-circuit S/370 microprocessor on a chip, which received wide publicity in technical journals for its advanced placement and wiring design automation programs. In the 1980s, he worked on the development of several new high-speed, low-power bipolar and BiCMOS circuits to increase the number of bipolar circuits per chip. Mr. Dansky has authored several papers; he holds nine patents in high-performance VLSI circuit design and crosstalk calculation methodology.
Robert F. Hatch
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (rfhatch@us.ibm.com).
Mr. Hatch is a Senior Engineer in the Custom Design Department of the S/390 Division. He received a B.S. degree in engineering from Southern Illinois University in 1976 and an M.S. degree in electrical engineering from Purdue University in 1978. Mr. Hatch joined IBM in 1978 at the East Fishkill facility, where he did custom PLA circuit design for a custom VLSI bipolar CPU chip set. His work has been in the areas of bipolar circuit design, MOS circuit design, macro design, VLSI chip design, and VLSI design tools. Mr. Hatch is currently working on the next generation of S/390 CMOS processors.
Dale E. Hoffman
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (daleh@us.ibm.com).
Mr. Hoffman is a Senior Engineering Design Manager in the S/390 Hardware Development Laboratory. In 1981 he joined IBM at the East Fishkill facility, where he developed and managed advanced VLSI logic and memory test systems. In 1993, he joined the Advanced CMOS Microprocessor group in Poughkeepsie as a design manager responsible for back-end design methodology, chip integration, and physical design and test for high-frequency custom microprocessors in the IBM S/390 G4, G5, and G6 Enterprise Servers. He is currently the processor subsystem manager for the next generation of advanced microprocessor and system development. Mr. Hoffman received a B.S.E.E. degree from Pennsylvania State University in 1981 and an M.S.E.E. degree from Syracuse University in 1984. He holds six U.S. patents and has several publications.
Mark D. Mayo
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (mayom@us.ibm.com).
Mr. Mayo is a Senior Engineer in the S/390 Hardware Development Laboratory, Poughkeepsie, New York. In 1980 he joined IBM at the East Fishkill facility, where he worked on the design and development of bipolar and BiCMOS gate arrays. In 1994, he joined the S/390 CMOS high-frequency microprocessor team in Poughkeepsie and led the circuit design teams for the G4, G5, and G6 buffer control element (BCE). Mr. Mayo received a B.S.E.E. degree, with high honors, from Lehigh University in 1980 and an M.S.E.E. degree from Syracuse University in 1985. He has received two IBM Outstanding Technical Achievement Awards and an IBM Outstanding Innovation Award for his circuit development work.
Scott A. McCabe
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (mccabes@us.ibm.com).
Timothy G. McNamara
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (tmcnamar@us.ibm.com).
Mr. McNamara is a Senior Engineer in S/390 custom microprocessor design. He received his B.E. degree in electrical engineering from the State University of New York at Stony Brook in 1983 and his M.S. degree in computer engineering from Syracuse University in 1990. He is currently working on high-performance clock system designs for the S/390 CMOS microprocessors. Mr. McNamara has authored or co-authored a number of technical papers; he holds three U.S. patents.
Thomas J. McPherson
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (mcpherso@us.ibm.com).
Mr. McPherson is an Engineering Manager in S/390 microprocessor development. He received his B.S. degree in electrical engineering from Rutgers University in 1990 and his M.S. degree in computer engineering from Syracuse University in 1994. Mr. McPherson joined IBM in 1990 as a logic designer for CMOS ASIC designs. Since 1994 he has worked on CMOS microprocessor designs. Mr. McPherson was the frequency leader for the G5 and G6 microprocessors and is currently working on future S/390 microprocessors.
Gregory A. Northrop
IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (gnorth@us.ibm.com).
Leon Sigal
IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598 (sigal@us.ibm.com).
Mr. Sigal received a B.S. degree in biomedical engineering in 1985 from the University of Iowa and an M.S. degree in electrical engineering in 1986 from the University of Wisconsin at Madison. He worked at Hewlett-Packard's microprocessor development laboratory between 1986 and 1992. Mr. Sigal joined IBM in 1992 and has since been involved in CMOS S/390 microprocessor circuit design.
Howard H. Smith
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (smithh@us.ibm.com). Mr. Smith received his B.S. and M.S. degrees in electrical engineering from the New Jersey Institute of Technology, Newark, in 1984 and 1985, respectively. He joined IBM in 1984 as an integrated circuit engineer at the semiconductor development laboratory in East Fishkill, New York, working in the area of high-performance masterslice designs. Mr. Smith is currently an Advisory Engineer in the IBM System/390 Division in Poughkeepsie, New York, where he is responsible for electrical analysis issues associated with high-density CMOS circuit technology and package-related products. Recent assignments have included the development and coordination of on-chip noise verification processes for the S/390 processor designs. His expertise lies in the area of electrical noise modeling and prediction in system-level computer operation. Mr. Smith has co-authored several papers on system-level noise prediction, on-chip interconnects, and electromagnetic characterization of connectors and antennas.
David A. Webber
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (webberd@us.ibm.com).
Mr. Webber is an Advisory Engineer in IBM S/390 microprocessor development. He joined IBM in 1983 in Hopewell Junction, New York, working on the design of automated test equipment. Since 1993, he has been working on circuits and integration for S/390 CMOS microprocessors. Mr. Webber received B.S. and M.S. degrees in electrical engineering from the University of Illinois in 1981 and 1983, respectively.
Patrick M. Williams
IBM System/390 Division, 522 South Road, Poughkeepsie, New York 12601 (patricw@us.ibm.com).
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