|
|
 |
|
 |
Volume 43, Number 3, 1999
Ultrathin dielectric films |
|
Table of contents: HTML PDF ASCII |
|
This article: HTML PDF ASCII |
Copyright info |
 |
 |
 |
 |
| |
|
Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides - References
|
 |
by S.-H. Lo,
D. A. Buchanan and
Y. Taur. |
 |
 |
 |
References
-
Y. Taur, D. A. Buchanan, W. Chen, D. J. Frank, K. E. Ismail, S.-H. Lo, G. A. Sai-Halasz, R. G. Viswanathan, H.-J. C. Wann, S. J. Wind, and H.-S. Wong, "CMOS Scaling into the Nanometer Regime," Proc. IEEE 85, No. 4, 486-504 (1997).
-
G. Baccarani and M. R. Wordeman, "Transconductance Degradation in Thin-Oxide MOSFET's," IEEE Trans. Electron Devices 30, No. 10, 1295-1304 (1983).
-
K. S. Krisch, J. D. Bude, and L. Manchanda, "Gate Capacitance Attenuation in MOS Devices with Thin Gate Dielectrics," IEEE Electron Device Lett. 17, 521-524 (1996).
-
Y. Ohkura, "Quantum Effects in Si n-MOS Inversion Layer at High Substrate Concentration," Solid-State Electron. 33, No. 12, 1581-1585 (1990).
-
C. Y. Wong, J. Y.-C. Sun, Y. Taur, C. S. Oh, R. Angelucci, and B. Bavari, "Doping of n+ and p+ Polysilicon in a Dual-Gate Process," IEDM Tech. Digest, pp. 238-241 (1988).
-
H. S. Momose, M. Ono, T. Yoshitomi, T. Ohguro, S. Nakamura, M. Saito, and Hiroshi Iwai, "Tunneling Gate Oxide Approach to Ultra-High Current Drive in Small-Geometry MOSFETs," IEDM Tech. Digest, pp. 593-596 (1994).
-
R. E. Collin, Field Theory of Guided Waves, 2nd Ed., IEEE Press, New York, 1991.
-
F. Stern, "Self-Consistent Results for n-type Si Inversion Layers," Phys. Rev. B 5, No. 12, 4891-4899 (1972).
-
J. Suñé, P. Olivo, and B. Riccò, "Quantum-Mechanical Modeling of Accumulation Layers in MOS Structure," IEEE Trans. Electron Devices 39, 1732-1739 (1992).
-
C. Moglestue, "Self-Consistent Calculation of Electron and Hole Inversion Charges at Silicon-Silicon Dioxide Interfaces," J. Appl. Phys. 59, No. 9, 3175-3183 (1986).
-
Sorab K. Ghandhi, The Theory and Practice of Microelectronics, John Wiley and Sons, Inc., New York, 1968.
-
Z. A. Weinberg, "On Tunneling in Metal-Oxide Silicon Structures," J. Appl. Phys. 53, No. 7, 5052-5056 (1982).
-
J. Maserjian, "Tunneling in Thin MOS Structures," J. Vac. Sci. Technol. 11, No. 6, 996-1003 (1974).
-
J. G. Simmons, "Generalized Formula for the Electric Tunneling Effect Between Similar Electrodes Separated by a Thin Insulating Film," J. Appl. Phys. 34, No. 6, 1793-1803 (1963).
-
F. Rana, S. Tiwari, and D. A. Buchanan, "Self-Consistent Modeling of Accumulation Layers and Tunneling Currents Through Very Thin Oxides," Appl. Phys. Lett. 69, No. 8, 1104-1106 (1996).
-
S. Datta, Quantum Phenomena, Addison-Wesley Publishing Co., Reading, MA, 1989.
-
M. J. McNutt and C. T. Sah, "Determination of the MOS Oxide Capacitance," J. Appl. Phys. 46, No. 9, 3909-3913 (1975).
-
K. Lehovec and S.-T. Lin, "Analysis of C-V Data in the Accumulation Regime of MIS Structures," Solid-State Electron. 19, 993-996 (1976).
-
B. Riccò, P. Olivo, T. N. Nguyen, T.-S. Kuan, and G. Ferriani, "Oxide-Thickness Determination in Thin-Insulator MOS Structures," IEEE Trans. Electron Devices 35, No. 4, 432-438 (1988).
-
R. Rios and N. D. Arora, "Determination of Ultra-Thin Gate Oxide Thicknesses for CMOS Structures Using Quantum Effects," IEDM Tech. Digest, pp. 613-616 (1994).
-
M. J. van Dort, Pierre H. Woerlee, A. J. Walker, A. H. Juffermans, and H. Lifka, "Influence of High Substrate Doping Levels on the Threshold Voltage and the Mobility of Deep-Submicrometer MOSFET's," IEEE Trans. Electron Devices 39, No. 4, 932-938 (1992).
-
S.-H. Lo, D. A. Buchanan, Y. Taur, and W. Wang, "Quantum-Mechanical Modeling of Electron Tunneling Current from the Inversion Layer of Ultra-Thin-Oxide nMOSFET's," IEEE Electron Device Lett. 18, No. 5, 209-211 (1997).
|
 |
|
|