IBM Skip to main content
  Home     Products & services     Support & downloads     My account  
  Select a country  
Journals Home  
  Systems Journal  
Journal of Research
and Development
  ·  Current Issue  
  ·  Recent Issues  
  ·  Papers in Progress  
  ·  Search/Index  
  ·  Orders  
  ·  Description  
  ·  Patents  
  ·  Recent publications  
  ·  Author's Guide  
  Staff  
  Contact Us  
IBM Journal of Research and Development  
Volume 43, Numbers 1/2, 1999
Plasma processing
 Table of contents: arrowHTML arrowASCII   This article: arrowHTML arrowASCII
arrowCopyright info
   

Plasma-assisted chemical vapor deposition of dielectric thin films for ULSI semiconductor circuits - Author bios

by D. R. Cote, S. V. Nguyen, A. K. Stamper, D. S. Armbrust, D. Tobben , R. A. Conti , and G. Y. Lee

Biographical sketches of authors

Donna R. Cote IBM Microelectronics Division, East Fishkill facility, Hopewell Junction, New York 12533 (coted@us.ibm.com). Ms. Cote is an Advisory Engineer at the IBM Advanced Semiconductor Technology Center, working in advanced CMOS logic development. She joined IBM in 1990 at the development laboratory in Essex Junction, Vermont. Ms. Cote currently has responsibility for advanced (copper) BEOL integration and process development. Previous assignments include plasma-enhanced and thermal low-temperature CVD dielectric process development and integration for 0.35-µm-0.175-µ m-generation DRAM in the development alliance with the Siemens and Toshiba corporations, where she had been the insulator project team leader for the past several years. Ms. Cote received a B.S. and an M.S. in chemistry from Tufts University in 1978 and 1980, respectively. She has received IBM Invention Achievement Awards and has published papers in the areas of dielectric deposition, plasma etching, and process integration.

Son Van Nguyen IBM Systems Storage Division, San Jose facility, San Jose, California 95193 (son1@vnet.ibm.com). Dr. Nguyen is a Senior Engineer in the IBM San Jose air-bearing surface advanced process fabrication technology group. He joined IBM in 1981 at its research and development laboratory in Essex Junction, Vermont, and has worked on advanced chemical vapor deposition and etching processes, plasma- and laser-based processes, surface tribology, and fabrication technology for both silicon integrated circuits and computer disk storage applications. Dr. Nguyen received a B.A. in chemistry in 1978 from the State University of New York at Plattsburgh, and a Ph.D. in solid-state chemistry in 1981 from Brown University. In 1980, he worked at the Exxon Research and Engineering Laboratory on catalysis for coal gasification. Dr. Nguyen has more than 44 patents issued and filed, and he has received twelve IBM Invention Achievement Awards. He has published and presented more than 88 papers in various technical journals and conferences.

Anthony K. Stamper IBM Microelectronics Division, Burlington facility, Essex Junction, Vermont 05452 (astamper@us.ibm.com). Dr. Stamper is a Senior Engineer in the IBM advanced CMOS logic technology development organization. He joined IBM in 1991 in Essex Junction, Vermont, and has also held assignments in the Advanced Semiconductor Technology Center at East Fishkill, New York. He is currently responsible for metal interconnect integration in the IBM advanced logic (copper) development program in Essex Junction. Dr. Stamper's previous assignments have involved premetal and intermetal dielectric process development and integration for 0.50-µm-0.25-µm-generation CMOS logic and DRAM circuits. In addition, he has chaired the IBM Low Temperature Insulator Strategic Equipment Council and Technology Leader Committee focus teams since 1995. He received a B.S. degree in electrical engineering from the University of Connecticut in 1987 and M.S. and Ph.D. degrees in electrical and computer engineering from Carnegie Mellon University in 1989 and 1991, respectively. Dr. Stamper is the author of a number of patents and papers on metal interconnect integration and process development.

Douglas S. Armbrust IBM Microelectronics Division, Burlington facility, Essex Junction, Vermont 05452 (armbrusd@us.ibm.com). Mr. Armbrust is a Process Engineer in the CMOS logic/DRAM development program. He received a B.S. in materials science and engineering from Pennsylvania State University. In 1995, he joined IBM in Essex Junction, Vermont, where he worked on PECVD, SACVD, and HDP CVD development and integration. Mr. Armbrust has published papers in the area of dielectric CVD process development and integration.

Dirk Tobben Siemens Microelectronics Inc., East Fishkill facility, Hopewell Junction, New York 12533 (dtobben@dda.siemens.com). Dr. Tobben is a Process Engineer in the Thin Films and Chemical Mechanical Polishing Department in the IBM-Siemens DRAM Development Alliance. His present responsibilities focus on insulator deposition and integration, specifically regarding advanced FEOL and low-k BEOL processes for 64MB-1Gb DRAM applications. He received M.S. and Ph.D. degrees in semiconductor physics from the Technical University of Munich, Germany, in 1992 and 1995, respectively. Dr. Tobben joined Siemens in 1995 and has since been involved in projects on organic and inorganic spin-on materials as well as CVD deposition techniques. He is a coauthor of several publications on those subjects and is a member of the German Physical Society.

Richard A. Conti IBM Microelectronics Division, East Fishkill facility, Hopewell Junction, New York 12533 (conti@us.ibm.com). Mr. Conti is an Advisory Engineer in the Thin Films and Chemical Mechanical Polishing Department in the IBM-Siemens DRAM Development Alliance. He joined IBM in 1984 at the development laboratory in East Fishkill and has worked in the fields of advanced CVD (chemical vapor deposition), analysis and design of plasma-enhanced and thermal chemical vapor deposition processes, and sputter deposition. Mr. Conti received a B.S. in chemical engineering from the Polytechnic Institute of New York in 1983 and an M.S. in chemical engineering practice from the Massachusetts Institute of Technology in 1984. He has received several IBM Invention Achievement Awards and several IBM informal awards for contributions in the area of CVD. Mr. Conti is also the author of several papers on the subjects of reactor design and deposition of CVD dielectrics.

Gill Yong Lee Siemens Microelectronics Inc., East Fishkill facility, Hopewell Junction, New York 12533 (v2ti321@dda.siemens.com). Mr. Lee is a Lead Engineer in the Thin Films and Chemical Mechanical Polishing Department in the IBM-Siemens DRAM Development Alliance. He is responsible for plasma-enhanced and thermal low-temperature CVD processes for DRAM applications. He received a B.S. in ceramic engineering in 1988 from Yonsei University in Seoul, Korea, and an M.S. in materials science and engineering in 1991 from POSTECH in Pohang, Korea. Before joining Siemens in 1996, he was a Process Development Engineer for planarization and dielectric deposition in the Semiconductor Research and Development Laboratory at Hyundai Electronics. He is the author of a number of patents and papers on the subject of CVD dielectrics.