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IBM Journal of Research and Development  
Volume 43, Numbers 1/2, 1999
Plasma processing
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Plasma-etching processes for ULSI semiconductor circuits - Author bios

by M. Armacost, and P. D. Hoh, and R. Wise, and W. Yan, and J.J. Brown, and J. H. Keller, and G. A. Kaplita

Biographical sketches of authors

Michael Armacost IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (marmacos@us.ibm.com). Mr. Armacost is a Development Engineer working for IBM Microelectronics in Hopewell Junction, New York. From 1988 to 1998, he worked on plasma etching for advanced semiconductor applications, focusing on high-density plasma oxide etching. He is currently working on the integration of Cu-based wiring technology in advanced logic products and leads the Strategic Equipment Commission on etching system purchase decisions. He is an author or coauthor of more than a dozen U.S. patents in the fields of semiconductor processing and integration. Mr. Armacost holds a B.A. in chemistry from Western Maryland College and an M.S. in chemical engineering from Clarkson University.

Peter D. Hoh IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (hohp@us.ibm.com). Mr. Hoh is a Development Engineer with IBM Microelectronics in Hopewell Junction, New York. He joined IBM in 1979 and currently works in the Plasma Etching Department. His primary responsibility is gate etching, with a focus on etch-lithography interactions. Mr. Hoh received a B.S. in chemistry from the University of Missouri and a B.S. in chemical engineering from Pace University.

Richard Wise IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (richwise@us.ibm.com). Dr. Wise is a Development Engineer with IBM Microelectronics in Hopewell Junction, New York. He joined the DRAM Development Alliance (IBM, Siemens, and Toshiba) in July 1996 and is currently working in the Plasma Etching Unit Processes Department. His primary responsibility is dielectric etching, with a major focus on the application of high-density plasma tools for both high-aspect-ratio and high-selectivity applications. Dr. Wise received a B.ChE. from the University of Delaware, an M.S. from the University of South Carolina, and a Ph.D. in chemical engineering from the University of Houston, where he studied plasma rf and optical diagnostics, and particle/fluid simulation.

Wendy Yan IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (wendyyan@us.ibm.com). Dr. Yan is a Development Engineer with IBM Microelectronics in Hopewell Junction, New York. She joined the DRAM Development Alliance in July 1997 and currently works in the Plasma Etching Department. Her primary responsibility is dielectric etching, with a focus on small-dimension, high-aspect-ratio features and high-selectivity-to-resist applications. She had three years of prior experience with the Applied Materials Corporation in the areas of metal and oxide etching. Dr. Yan received a Ph.D. in ceramics from Rutgers University, where she studied microelectronic substrate materials.

Jeffrey J. Brown IBM Microelectronics Division, IBM Semiconductor Research and Development enter, 1580 Route 52, Hopewell Junction, New York 12533 (brownjj@us.ibm.com). Mr. Brown is a Process Engineer working for IBM Microelectronics in Hopewell Junction, New York. He is responsible for plasma etching process development and manufacturing for the IBM Microelectronics Division. Since 1994, he has worked on plasma etching processing for advanced semiconductor applications. He is currently working on high-density plasma gate-conductor etching. Mr. Brown holds a B.S. in electrical engineering from Carnegie Mellon University and an M.S. in electrical engineering from Columbia University.

John H. Keller IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (jhkeller@us.ibm.com). Dr. Keller is a Senior Technical Staff Member with IBM Microelectronics in Hopewell Junction, New York. Since joining IBM in 1968, he has worked in the fields of plasma and discharge physics, and is currently working on cold negative-ion plasmas for RIE. He is an author or coauthor of more than 30 U.S. patents in the fields of inductively coupled plasmas and helicon sources for plasma processing and ion implantation. Dr. Keller received a B.S. in physics from RPI and a Ph.D. in electrical engineering from the University of Utah, where he studied plasmas in magnetic fields.

George A. Kaplita IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (kaplita@us.ibm.com). Mr. Kaplita is a Process Engineer working for IBM Microelectronics in Hopewell Junction, New York. He is currently working on polysilicon etching in the Advanced Semiconductor Technology Center. Since 1982 he has worked on silicon trench etching and polysilicon etching in both manufacturing and development. Mr. Kaplita holds a B.S. degree in metallurgical engineering from Purdue University and an M.S. degree in materials science from Syracuse University.

Scott D. Halle IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (halle@us.ibm.com). Dr. Halle is a Development Engineer with IBM Microelectronics in Hopewell Junction, New York. He joined the DRAM Development Alliance in the Semiconductor Research and Development Center in 1994. Within the Plasma Etching Department, his major focus is currently on the development and understanding of both chemical (downstream) plasma etching processes for resist, polysilicon, nitride, and reactive ion etching of polysilicon for shallow-trench isolation. He was a Postdoctoral Fellow in the Physics Department at the University of Tokyo. Dr. Halle received his undergraduate degree in chemistry from Wesleyan University, an M.S. in electrical engineering at Columbia University, and a Ph.D. in physical chemistry from the Massachusetts Institute of Technology.

K. Paul Muller IBM Microelectronics Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (mullerkp@us.ibm.com). Dr. Muller is a Development Engineer with IBM Microelectronics in Hopewell Junction, New York. Since joining IBM in 1990, he has worked in the fields of plasma development of resists and X-ray mask manufacturing, as well as deep-trench and metal etching. Currently he is leading the Metrology Team in the DRAM Development Alliance. For his work on X-ray mask repair, Dr. Muller received a Ph.D. in electrical engineering from the Technical University, Berlin, Germany.

Munir D. Naeem Siemens Microelectronics, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (naeem@us.ibm.com). Dr. Naeem is an Advisory Development Engineer in the DRAM Development Alliance. He joined IBM in 1985 and has since worked in the areas of semiconductor manufacturing, thin-film deposition techniques, and BEOL RIE process development for bipolar, biCMOS, and CMOS circuits. Dr. Naeem received a B.S. degree in chemical engineering from the University of Engineering and Technology, Pakistan, and an M.S. degree in industrial engineering and operations research from the Georgia Institute of Technology. He completed his Ph.D. in 1993 through the IBM Resident Study Program, from the Rensselaer Polytechnic Institute. He is currently on assignment at the IBM manufacturing facility in France.

Senthil Srinivasan Siemens Microelectronics, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (senthil@us.ibm.com). Mr. Srinivasan is a Development Engineer with Siemens Microelectronics in Hopewell Junction, New York. He joined the DRAM Development Alliance in July 1996 and is currently working on gate-conductor plasma etching development and the evaluation of the dry etching characteristics of new lithographic materials (ARCs and resists). Prior to joining Siemens, he worked as an Applications Engineer for the Plasma & Materials Tech. Company (later Trikon Tech.) and was involved in the development of their helicon (MORI) high-density plasma source. Mr. Srinivasan received an M.S. degree in engineering sciences from Louisiana State University.

Hung Y. Ng IBM Research Division, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (ngy@us.ibm.com). Mr. Ng is a Development Engineer with the IBM Research Division in Hopewell Junction, New York. He received a B.S. degree in chemical engineering from SUNY at Buffalo and an M.S. degree in both chemical and petroleum engineering from the University of Pittsburgh in 1983. Since joining IBM in 1984, he has been working on process development and BEOL integration; he is currently involved in FEOL integration and gate etching.

Martin Gutsche Siemens Microelectronics, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (v2ti310@us.ibm.com). Dr. Gutsche is a Process Engineer with Siemens Microelectronics in Hopewell Junction, New York. He joined the DRAM Development Alliance in January 1996 and is currently working in the Plasma Etching Department. Currently, his primary responsibility is metal etching, with a major focus on new materials. Dr. Gutsche received a Ph.D. in physics from the Technical University of Munich, Germany.

Alois Gutmann Siemens Microelectronics, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (v2ti238@us.ibm.com). Dr. Gutmann manages the DRAM Development Alliance Plasma Etching Department in Hopewell Junction, New York. From 1993 to early 1997 he was manager of the Lithography Department for the IBM/Siemens/Toshiba program at Hopewell Junction, working on 256Mb DRAM. From 1988 to 1992, he worked at Siemens in Munich on the development, optimization, and implementation of lithography processes for 1M to 16M DRAM devices. After receiving a Ph.D. in physical chemistry, Dr. Gutmann worked for five years as a research scientist in the areas of surface science and catalysis at research sites in the U.S. (Purdue University) and West Berlin (Fritz-Haber-Institute of Max-Planck-Society).

Bruno Spuler Siemens Microelectronics, IBM Semiconductor Research and Development Center, 1580 Route 52, Hopewell Junction, New York 12533 (v2spuler@us.ibm.com). Mr. Spuler is a Process Engineer with Siemens Microelectronics in Hopewell Junction, New York. He joined Siemens in 1978 and is currently working in dry etching and stripping. His responsibilities include metal and oxide etching for advanced DRAM products.