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Volume 39, Number 4, 1995
On-chip interconnection technology |
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Table of contents:  HTML |
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Copyright info |
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Low-temperature chemical vapor deposition processes and dielectrics for microelectronic circuit manufacturing at IBM |
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by D. R. Cote, S. V. Nguyen, W. J. Cote, S. L. Pennington, A. K. Stamper, and D. V. Podlesnik |
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Significant progress has been made over the past decade in
low-temperature plasma-enhanced and thermal chemical vapor deposition
(CVD). The progress has occurred in response to the high demands placed
on the insulators of multilevel microelectronic circuits because of the
continuing reduction in circuit dimensions. High-aspect-ratio gap
filling is foremost among these demands, which also include lower
processing temperatures and improved dielectric planarization. This
paper reviews the history of interlevel and intermetal dielectrics used
in microelectronic circuit manufacturing at IBM and the current status of
processes used in IBM manufacturing and development lines, and describes
the challenges for future memory and logic chip applications.
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