A survey of hardware designs for decimal arithmetic
by L.-K. Wang,
M. A. Erle,
C. Tsen,
E. M. Schwarz,
and M. J. Schulte
Decimal data and decimal arithmetic operations are ubiquitous in
daily life. Although microprocessors normally use binary arithmetic
for computations, decimal arithmetic is often required in financial
and commercial applications. Due to the increasing importance of
and demand for decimal arithmetic, decimal floating-point (DFP)
formats and operations are specified in the revised IEEE Standard
for Floating-Point Arithmetic (IEEE 754-2008). This paper provides
a survey of hardware designs for decimal arithmetic. It gives an
overview of DFP arithmetic in IEEE 754-2008, describes processors
that provide hardware and instruction set support for decimal
arithmetic, and provides a survey of hardware designs for decimal addition,
subtraction, multiplication, and division. Finally, it describes
potential areas for future research.
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