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This historically interesting paper describes the profound increase in density and speed in memory technology—as well as the decrease in power and cost—that has taken place over a period of 25 years. In particular, the authors provide an overview that discusses the ways in which processor memory technology has evolved from ferrite cores and thin magnetic films in the 1950s and 1960s, to semiconductor memories in the late 1960s through the 1970s, along with the various innovations that made this revolution possible. Technology has certainly come a long way from some of the earliest memories used in electronic calculating machines, such as the mercury sonic delay line developed in the late 1940s. The authors mention that this serially addressed memory required several milliseconds to read or write information.
Some of the early forms of memory in the 1940s are particularly fascinating, and historians of science note that the scarcity of reliable memory technology held back the advance of digital computers at this time. According to the Encyclopedia of 20th Century Technology, “the delay line worked by using a piezoelectric quartz crystal to convert an electrical signal into a sonic wave pulse, which then traveled through a liquid medium at the speed of sound in a long tube, and was then converted back to an electric signal. The difference in the speed of propagation meant that a number of bits of data could be stored.” In 1949, mercury acoustic delay lines were first used in digital computers at the Cavendish Laboratory in Cambridge, UK, where 32 sets of delay lines each stored 32 words of 18 bits. This amount of storage corresponds to a total of about two kilobytes.
For a more recent paper on a related topic, see E. Adler et al., “The evolution of IBM CMOS DRAM technology,” IBM Journal of Research and Development 39, No. 1/2, pp. 167-188 (1995). This paper describes the development of DRAM at IBM, which produced many novel processes and sophisticated analysis methods. See also J. A. Mandelman et al., “Challenges and future directions for the scaling of dynamic random-access memory (DRAM),” IBM Journal of Research and Development 46, No. 2/3, pp. 187-212 (2002). This paper discusses the interrelationships among the DRAM scaling requirements and their possible solutions.
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