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Introduction to the Cell multiprocessor
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by J. A. Kahle, M. N. Day, H. P. Hofstee, C. R. Johns, T. R. Maeurer, and D. Shippy |
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IBM Journal of Research and Development, Volume 49, Issue 4/5, pp. 589-604 (2005).
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This paper provided an early introduction to the Cell multiprocessor, jointly developed by Sony, Toshiba, and IBM. The authors note that several important factors led to the success of the Cell multiprocessor design. For example, a holistic design approach was used that encompassed processor architecture, hardware implementation, system structures, and software programming models. The design incorporated many flexible elements that ranged from reprogrammable synergistic processors to reconfigurable I/O interfaces in order to support many system configurations with one high-volume chip.
The authors also note that the Cell project was driven by the need to develop a processor for next-generation entertainment systems, and that such a system, when designed properly, is also effective in a wide range of other applications. A related paper [“Using advanced compiler technology to exploit the performance of the Cell Broadband Engine™ architecture,” IBM Systems Journal 45, No. 1, pp. 59-84 (2006)] discusses how the Cell Broadband Engine architecture targets a variety of such applications, providing both flexibility and high performance by using a 64-bit multithreaded PowerPC® processor element (PPE) with two levels of globally coherent cache and eight synergistic processor elements (SPEs). This 2006 paper also addresses the general challenge in which the growth in processor complexity drives the need for sophisticated compiler technology.
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