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Modeling and characterization of long on-chip interconnections for high-performance microprocessors
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by A. Deutsch,
G. V. Kopcsay,
C. W. Surovic,
B. J. Rubin,
L. M. Terman,
R. P. Dunne, Jr.,
T. A. Gallo,
and R. H. Dennard |
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IBM Journal of Research and Development, Volume 39, Issue 5, pp. 547-567 (1995).
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Critical interconnections on a computer chip commonly traverse dimensions of the order of the length of a chip edge and with lengths of sometimes as much as a centimeter. These interconnections include clock lines, control lines, and data lines between processor and cache. Signal delay on such lines can limit the chip performance and make it difficult for technologists to attain high microprocessor clock frequencies.
The research in this highly cited paper discusses wiring that provides the global interconnection between functional logic units on a chip. In particular, the paper focuses on challenges encountered when using long, nonuniform, on-chip transmission lines. Additionally, the authors establish guidelines that allow circuit designers to take advantage of lower-resistance interconnections for use in high-speed, cycle-determining paths. Before the publication of this paper, these kinds of wiring lines had not been analyzed in great depth, because such lines represented a small portion of the total wiring demand. The authors show that the performance of such interconnections is crucial in certain critical paths.
As a result of this paper and the analyses it describes, new simulation techniques and practical CAD tools were invented at IBM. At the time the paper was written, IBM tools did not generally deal with lossy lines. This work also motivated the development of a new back-end-of-line (BEOL) optimization tool to help technologists to define and design the on-chip wiring stack. Today, designers involved with chip clock distribution for IBM microprocessors routinely use tools that had their genesis in the concepts described in the paper. These kinds of tools played a crucial role in the design of reliable zSeries™ and pSeries™ microprocessors and in the establishment of key partnerships between IBM and other technology companies.
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