Damascene copper electroplating for chip interconnections

IBM Journal of Research and Development, Volume 42, Issue 5, pp. 567-574 (1998).

Copper wiring on integrated circuit chips, introduced by IBM in September 1997, is deposited using low-cost electrolytic plating. Copper wires conduct electricity with about 40% less resistance than traditional aluminum-based wires, are less vulnerable to electromigration, and lead to faster microprocessors. The dual-damascene electroplating process, which deposits copper simultaneously in via holes and overlying line trenches, is ideally suited for the fabrication of copper chip interconnections. By selecting appropriate deposition conditions and by the use of proprietary additives, electroplating within trenches can be made to occur preferentially at the bottom of the trenches, leading to void- and seam-free deposits. This paper presents experimental results and the evolution of mathematical modeling of Cu profile in trenches during damascene plating. In 2005, the use of “copper conductors” for interconnects was among the innovations cited when IBM was presented with the 2004 U.S. National Medal of Technology.

See the 2004 National Medal of Technology awarded to the IBM Microelectronics Division in 2005 and the IBM Press Release of the announcement.