Publications
- D. Goren et al, "An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 GHz) On-Chip Transmission Line Approach", IEEE DATE02 conference, pp. 804-810, Paris (2002).
- D. Goren et al, "On-Chip Interconnect-Aware Design and Modeling Methodology, based on High Bandwidth Transmission Line Devices", IEEE DAC 2003 conference, Anaheim (2003).
- R. Gordin, D. Goren and M. Zelikson, "Modeling of On-Chip Transmission Lines in High-Speed A&MS Design - The Low Frequency Inductance Calculation", IEEE Signal Propagation on Interconnects Conference, pp. 129-132 Pisa (2002).
- D. Goren, R. Gordin, and M. Zelikson, "Modeling Methodology for On-Chip Coplanar Transmission Lines over the Lossy Silicon Substrate", IEEE Signal Propagation on Interconnects conference, Siena, (2003).
(Model , Model slider) - R. Gordin, D. Goren, and M. Zelikson, "Study of On-Chip Coplanar Transmission Lines over the Lossy Silicon Substrate", IEEE Signal Propagation on Interconnects conference, Siena (2003).
- T. Zwick, Y. Tretiakov and D. Goren, "On-Chip Transmission Line Measurement and Modeling in IBM SiGe Technology up to 110[GHz]", IEEE Microwave and Wireless Components Letters (1994).
