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The Solution

Genesys-Pro was specifically designed to address the challenges of test case generation for processor and multi-processor verification.

The tool is based on a generic engine that receives as input:

  • Test specification - describes a verification scenario
  • Design model - describes the design architecture and micro-architecture

The design model is specified in a declarative language that contains special constructs for describing the architecture and micro-architecture-including instructions, registers, cache structure, and translation mechanisms.

The test scenario is specified in a programming-like language, with special constructs for specifying biased random scenarios involving stimuli for one or more processors.

The restrictions specified by the test template and the design model are automatically translated into constraints on the output test.

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Graphical IDE
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Example test template

A dedicated graphical IDE allows the rapid development and debugging of test scenarios. The interface was designed to allow simple scenario definition for the casual user while still providing full capabilities for experts. It relieves users from having to remember language syntax and access off-line documentation.

Genesys-Pro can also bias the tests into triggering interesting architectural and micro-architectural events that are likely to expose design bugs.

The generic engine employs a powerful constraint satisfaction problem (CSP) solver especially tuned to the characteristics of the resulting CSP. This helps obtain a test that conforms to the scenario, the architectural restrictions, and many biases.

Genesys-Pro is also integrated with two deep-knowledge test generators, FPgen and DeepTrans. This allows Genesys-Pro to create sophisticated and difficult to create scenarios in the areas of floating point and memory management unit (MMU) verification.

Genesys-Pro uses a reference model to track the state of the processor throughout the test generation. The tool can then adapt the generation based on the state of the processor and report the expected results.

By customizing the design model, Genesys-Pro is able to support all variants of the Power architecture as well as other architectures, ranging from ARM to the mainframe zArchitecture.