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Genesys-Pro is an industry-leading state-of-the-art test program generator for processor and multi-processor functional verification. Genesys-Pro:

  • Provides an efficient means for creating architectural tests that implement verification plans
  • Enables users to specify the desired extent of randomness in the generated tests, ranging from completely deterministic to totally random

Genesys-Pro is a primary solution for verification teams seeking an effective and sustainable solution for the verification of large-scale industrial processor designs. These demand tool customization abilities, concurrent support of multiple designs, and support for complex architecture and micro architectural features such as multi processor coherency, VLIW, floating point, and address translation.