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Papers

  • Genesys paper in IAAI94: Describes the Model Based Test Generator which was the former version of Genesys.
    (PostScript, 1,530 KB)

  • Genesys paper in DAC95: Describes the Genesys methodology for generating functional test programs, including the Modeling and Generation process.
    (PostScript, 210 KB or PDF, 50 KB)

  • Genesys paper in IPCCC95: Describes how Genesys solves memory access constraints.
    (PostScript, 78 KB or PDF, 16 KB)

  • Genesys paper in DATE99: Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator. Application to the X86 Microprocessors Family.
    (PostScript, 173 KB or PDF, 34 KB)

  • Genesys paper in ICASSP99: Fast Construction of Test-Program Generators for Digital Signal Processors.
    (PostScript, 142 KB or PDF, 25 KB)

  • Genesys Paper in HLDVT02: An Effective and Flexible Approach to Functional Verification of Processors Families. Describes a Genesys based functional verfication methodology. This paper includes the results of Genesys usage within STMicroelectronics.
    (Abstract), (PostScript, 1032 KB or PDF, 150 KB)




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